K1839

К1839 is a microprocessor chipset developed between 1984 and 1989 at the Angstrem Research Institute by the same team that developed the 1801BMx series of CPUs. It was the first Soviet, and later the first Russian 32-bit microprocessor system. From a programmer's point of view, it was a complete replica of the VAX 11/750 Comet and included floating-point arithmetic, unlike the MicroVAX microprocessors produced by DEC. The chipset included a processor, a coprocessor for integer and floating-point arithmetic, a memory controller and a bus adapter. It was fabricated in a 3 μm process. The Electronika-32 computer and a VAX-PC board were built based on this chipset, as well as the aerospace on-board digital computer SB3541 (developed by LNPOEA - OKB "Electroavtomatika", St. Petersburg). The 1839 chipset is still in production, and is used in the control systems of the GLONASS-M satellites.

The processor had external microprogram control, that is, in addition to the CPU, a separate ROM was required (1839RE1 for special equipment or any 16kW 32-bit ROM with the appropriate cycle time). However, this does not mean that the instruction set could be modified arbitrarily since the instruction decoder was included in the circuitry of the CPU.

According to posts on the FidoNet forum MO.DEC, the arithmetic coprocessor was originally released with errors, and it was not always possible to run software written for the VAX. To circumvent this, updated microprograms were released to emulate the coprocessor functions in microcode on the CPU. Bug fixed chips were introduced at the Comtek'93 exhibition.

Chipset

 * L1839VM1 (Л1839ВМ1) — The central processor.
 * The VAX-11 instruction set includes 304 instructions, 21 addressing modes, 8/16/32/64 bits of data, 32 bit machine word, 16 GPRs (general purpose registers) and hardware support for multitasking and virtual memory. Virtual addressing is 32-bit, the physical address bus is 24 bits wide and the data bus is 32 bits wide.
 * Frequency 10 MHz and consisted of 150,000 transistors. Register/register addition takes 2 cycles or 0.2 μs, and memory access 0.6 μs.
 * L1839VM2 (Л1839ВМ2) – Arithmetic and Floating point coprocessor.
 * 252 instructions, 8/16/32/64 bits integers, floating point F / D / G formats, and 24 bit addressing.
 * Frequency 10 MHz. Integer multiply 0.8 μs, floating point multiply 1.5 μs.
 * L1839VT1 (Л1839ВТ1) – DRAM and cache controller.
 * Supports 256 kbit and 1 Mbit DRAMs.
 * Frequency 10 MHz. DRAM word access time 800ns, cache access time of 200ns.
 * L1839VT2 (Л1839ВТ1) – SRAM controller
 * Supports 8/16/32 bit data words and 24 bit addresses.
 * Frequency 10 MHz. 200-400ns memory access time, parity or Hamming error correction.
 * L1839VV1 (Л1839ВВ1) – 32-bit/Q-bus host adaptor and interrupt controller.
 * Q-bus 8/16 bit accesses, 18 bit addresses
 * 32-bus 8/16/32 bit accesses, 24 bit addresses
 * 18 vector interrupts, and 4 interrupt priority levels.
 * Frequency 10 MHz.
 * N1839RE1A/B (Н1839РЕ1А/Б) – Microprogram ROM
 * 16kW 32-bit word mask ROM.
 * Frequency 10 MHz. Access time 180ns.
 * N1839VZh2 (Н1839ВЖ2) – 8-bit majority gate
 * The majority (two of the three) bi-directional inputs with bit-wise control and diagnostics
 * 20ns cycle time.