List of Intel Xeon processors (Core-based)

"Allendale" (65 nm)

 * Based on Core microarchitecture
 * Chip harvests from Conroe with half L2 cache disabled
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All models support uni-processor configurations
 * Die size: 111 mm2
 * Steppings: L2

"Conroe" (65 nm)

 * Based on Core microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All models support uni-processor configurations
 * Die size: 143 mm2
 * Steppings: B2, G0

"Wolfdale-CL" (45 nm)

 * Based on Penryn microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * Models support only uni-processor configurations
 * Die size: 107 mm2
 * Steppings: E0, R0

"Wolfdale" (45 nm)

 * Based on Penryn microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All model support EIST
 * All models support only single-processor configurations
 * Die size: 107 mm2
 * Steppings: C0, E0

"Woodcrest" (65 nm)

 * Based on Core microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, EIST, XD bit (an NX bit implementation), Intel VT-x
 * All models support dual-processor configurations
 * Die size: 143 mm2
 * Steppings: B2, G0
 * For processors with G0 stepping Vmin = 0.85 V

"Wolfdale-DP" (45 nm)

 * Based on Penryn microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All model support EIST except L5238, L5240.
 * E5205, L5238, L5240, X5260, X5270, X5272 support Demand-Based Switching.
 * All models support dual-processor configurations
 * Die size: 107 mm2
 * Steppings: C0, E0

"Kentsfield" (65 nm)

 * Based on Core microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All models support uni-processor configurations
 * Die size: 2× 143 mm2
 * Steppings: B3, G0

"Yorkfield-6M" (45 nm)

 * Based on Penryn microarchitecture
 * Chip harvests from Yorkfield with half L2 cache disabled
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Enhanced Halt State (C1E), Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All models support uni-processor configurations
 * Die size: M1: 2× 107 mm2, R0: 2× 81 mm2
 * Steppings: M1, R0

"Yorkfield" (45 nm)

 * Based on Penryn microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Enhanced Halt State (C1E), Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All models support uni-processor configurations
 * Die size: 2× 107 mm2
 * Steppings: C1, E0

"Yorkfield-CL" (45 nm)

 * Based on Penryn microarchitecture
 * Chip harvests from Yorkfield with half L2 cache disabled
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Enhanced Halt State (C1E), Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All models support uni-processor configurations
 * Die size: 2× 107 mm2
 * Steppings: C1, E0

"Clovertown" (65 nm)

 * Based on Core microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * EIST support all except E5310, E5335.
 * Intel Demand-Based Switching support E5320, E5345, L5318, X5355, X5365.
 * All models support dual-processor configurations
 * Steppings: B3, G0
 * Die size: 2× 143 mm2

E5330, E5340 and E5350 is not listed on but it is mentioned on. In August 2007, E5330 is widely available. In June 2007, E5340 Engineering Samples were available on eBay.

"Harpertown" (45 nm)

 * Based on Penryn microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Intel 64, XD bit (an NX bit implementation), Intel VT-x, Demand-Based Switching except E5405, L5408; EIST except E5405
 * All models support dual-processor configurations
 * Die size: 2× 107 mm2
 * Steppings: C0, E0

"Tigerton" (dual-core) (65 nm)

 * Based on Core microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All models support quad-processor configurations
 * Die size: 143 mm2
 * Steppings: G0

"Tigerton QC" (quad-core) (MCP, 65 nm)

 * Based on Core microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * All models support quad-processor configurations
 * Die size: 2× 143 mm2
 * Steppings: G0

"Dunnington QC" (quad-core) (45 nm)

 * Based on Penryn microarchitecture
 * Chip harvests from Dunnington with two cores disabled
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Demand-Based Switching, Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * E7440 supports Enhanced Intel SpeedStep Technology (EIST).
 * All models support quad-processor configurations
 * Transistors: 1.9 billion
 * Die size: 503 mm2
 * Steppings: A1

"Dunnington" (six core) (45 nm)

 * Based on Penryn microarchitecture
 * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Demand-Based Switching, Intel 64, XD bit (an NX bit implementation), Intel VT-x
 * E7450 and X7460 support Enhanced Intel SpeedStep Technology (EIST).
 * All models support quad-processor configurations
 * Transistors: 1.9 billion
 * Die size: 503 mm2
 * Steppings: A1