OR-AND-invert

OR-AND-invert gates or OAI-gates are logic gates comprising OR gates followed by a NAND gate. They can be efficiently implemented in logic families like CMOS and TTL. They are dual to AND-OR-invert gates.

Overview
OR-AND-invert gates implement the inverted product of sums. $$n$$ groups of $$m_i$$, $$m_i \ge 1, i=1\ldots n$$ input signals combined with OR, and the results then combined with NAND.

2-1 OAI-gate
A 2-1-OAI gate realizes the function
 * $$Y = \overline{(A \lor B) \land C} $$

with the truth table shown below.

2-2 OAI gate
A 2-2-OAI gate realizes the function
 * $$Y = \overline{(A \lor B) \land (C \lor D)} $$

with the truth table shown below.

Realization
OAI-gates can efficiently be implemented as complex gates. An example of a 3-1 OAI-gate is shown in the figure below.

Examples of use
One possibility of implementing an XOR gate is by using a 2-2-OAI-gate with non-inverted and inverted inputs.