PMOS logic

PMOS or pMOS logic (from p-channel metal–oxide–semiconductor) is a family of digital circuits based on p-channel, enhancement mode metal–oxide–semiconductor field-effect transistors (MOSFETs). In the late 1960s and early 1970s, PMOS logic was the dominant semiconductor technology for large-scale integrated circuits before being superseded by NMOS and CMOS devices.

History and application
Mohamed Atalla and Dawon Kahng manufactured the first working MOSFET at Bell Labs in 1959. They fabricated both PMOS and NMOS devices but only the PMOS devices were working. It would be more than a decade before contaminants in the manufacturing process (particularly sodium) could be managed well enough to manufacture practical NMOS devices.

Compared to the bipolar junction transistor, the only other device available at the time for use in an integrated circuit, the MOSFET offers a number of advantages:
 * Given semiconductor device fabrication processes of similar precision, a MOSFET requires only 10% of the area of a bipolar junction transistor. The main reason is that the MOSFET is self-insulating and does not require p–n junction isolation from neighboring components on the chip.
 * A MOSFET requires fewer process steps and is therefore simpler and cheaper to manufacture (one diffusion doping step compared to four for a bipolar process ).
 * Since there is no static gate current for a MOSFET, the power consumption of an integrated circuit based on MOSFETs can be lower.

Disadvantages relative to bipolar integrated circuits were: General Microelectronics introduced the first commercial PMOS circuit in 1964, a 20-bit shift register with 120 MOSFETs – at the time an incredible level of integration. The attempt by General Microelectronics in 1965 to develop a set of 23 custom integrated circuits for an electronic calculator for Victor Comptometer proved to be too ambitious given the reliability of PMOS circuits at the time and ultimately led to the demise of General Microelectronics. Other companies continued to manufacture PMOS circuits such as large shift registers (General Instrument) or the analogue multiplexer 3705 (Fairchild Semiconductor) which were not feasible in bipolar technologies of the day.
 * The switching speed was considerably lower, due to large gate capacitances.
 * The high threshold voltage of early MOSFETs led to a higher minimum power-supply voltage (-24 V to -28 V ).

A major improvement came with the introduction of polysilicon self-aligned gate technology in 1968. Tom Klein and Federico Faggin at Fairchild Semiconductor improved the self-aligned gate process to make it commercially viable, resulting in the release of the analogue multiplexer 3708 as the first silicon-gate integrated circuit. The self-aligned gate process allowed tighter manufacturing tolerances and thus both smaller MOSFETs and reduced, consistent gate capacitances. For instance, for PMOS memories this technology delivered three to five times the speed in half the chip area. The polysilicon gate material not only made the self-aligned gate possible, it also resulted in a reduced threshold voltage and consequently in a lower minimum power supply voltage (e.g. -16 V ), reducing the power consumption. Because of the lower power supply voltage, silicon gate PMOS logic is often referred to as low-voltage PMOS in contrast to the older, metal-gate PMOS as high-voltage PMOS.

For various reasons Fairchild Semiconductor did not proceed with the development of PMOS integrated circuits as intensively as the involved managers wanted. Two of them, Gordon Moore and Robert Noyce, decided in 1968 to found their own startup instead – Intel. They were shortly afterwards joined by other Fairchild engineers, including Federico Faggin and Les Vadasz. Intel introduced its first PMOS static random-access memory with a capacity of 256 bit, the Intel 1101, in 1969. The 1024-bit dynamic random-access memory Intel 1103 followed in 1970. The 1103 was a commercial success and quickly began replacing magnetic core memory in computers. Intel introduced its first PMOS microprocessor, the Intel 4004, in 1971. A number of companies followed Intel's lead. Most early microprocessors were manufactured in PMOS technology: 4040 and 8008 from Intel; IMP-16, PACE and SC/MP from National Semiconductor; TMS1000 from Texas Instruments; PPS-4 and PPS-8 from Rockwell International. There are several commercial firsts in this list of microprocessors: the first 4-bit microprocessor (4004), the first 8-bit microprocessor (8008), the first single-chip 16-bit microprocessor (PACE), and the first single-chip 4-bit microcontroller (TMS1000; RAM and ROM on the same chip as the CPU).

By 1972, NMOS technology had finally been developed to the point where it could be used in commercial products. Both Intel (with the 2102) and IBM introduced 1 kbit memory chips. As the electron mobility in the n-type channel of NMOS MOSFETs is about three times that of the hole mobility in the p-type channel of PMOS MOSFETS, NMOS logic allows for an increased switching speed. For this reason NMOS logic quickly began to replace PMOS logic. By the late 1970s, NMOS microprocessors had overtaken PMOS processors. PMOS logic remained in use for a while due to its low cost and relatively high level of integration for applications such as simple calculators and clocks. CMOS technology promised a drastically lower power consumption than either PMOS or NMOS. Even though a CMOS circuit had been proposed already in 1963 by Frank Wanlass and commercial 4000 series CMOS integrated circuits had entered production in 1968, CMOS remained complex to manufacture and allowed neither the integration level of PMOS or NMOS nor the speed of NMOS. It would take until the 1980s for CMOS to replace NMOS as the main technology for microprocessors.

Description
PMOS circuits have a number of disadvantages compared to the NMOS and CMOS alternatives, including the need for several different supply voltages (both positive and negative), high-power dissipation in the conducting state, and relatively large features. Also, the overall switching speed is lower.

PMOS uses p-channel (+) metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other digital circuits. PMOS transistors operate by creating an inversion layer in an n-type transistor body. This inversion layer, called the p-channel, can conduct holes between p-type "source" and "drain" terminals.

The p-channel is created by applying a negative voltage (-25V was common ) to the third terminal, called the gate. Like other MOSFETs, PMOS transistors have four modes of operation: cut-off (or subthreshold), triode, saturation (sometimes called active), and velocity saturation.

While PMOS logic is easy to design and manufacture (a MOSFET can be made to operate as a resistor, so the whole circuit can be made with PMOS FETs), it has several shortcomings as well. The worst problem is that there is a direct current (DC) through a PMOS logic gate when the so-called "pull-up network" (PUN) is active, that is, whenever the output is high, which leads to static power dissipation even when the circuit sits idle.

Also, PMOS circuits are slow to transition from high to low. When transitioning from low to high, the transistors provide low resistance, and the capacitive charge at the output accumulates very quickly (similar to charging a capacitor through a very low resistance). But the resistance between the output and the negative supply rail is much greater, so the high-to-low transition takes longer (similar to discharge of a capacitor through a high resistance). Using a resistor of lower value will speed up the process but also increases static power dissipation.

Additionally, the asymmetric input logic levels make PMOS circuits susceptible to noise.

Most PMOS integrated circuits require a power supply of 17-24 volt DC. The Intel 4004 PMOS microprocessor, however, uses PMOS logic with polysilicon rather than metal gates allowing a smaller voltage differential. For compatibility with TTL signals, the 4004 uses positive supply voltage VSS=+5V and negative supply voltage VDD = -10V.

Gates
The p-type MOSFETs are arranged in a so-called "pull-up network" (PUN) between the logic gate output and positive supply voltage, while a resistor is placed between the logic gate output and the negative supply voltage. The circuit is designed such that if the desired output is high, then the PUN will be active, creating a current path between the positive supply and the output.

PMOS gates have the same arrangement as NMOS gates if all the voltages are reversed. Thus, for active-high logic, De Morgan's laws show that a PMOS NOR gate has the same structure as an NMOS NAND gate and vice versa.