Resistor–transistor logic

Resistor–transistor logic (RTL), sometimes also known as transistor–resistor logic (TRL), is a class of digital circuits built using resistors as the input network and bipolar junction transistors (BJTs) as switching devices. RTL is the earliest class of transistorized digital logic circuit; it was succeeded by diode–transistor logic (DTL) and transistor–transistor logic (TTL).

RTL circuits were first constructed with discrete components, but in 1961 it became the first digital logic family to be produced as a monolithic integrated circuit. RTL integrated circuits were used in the Apollo Guidance Computer, whose design began in 1961 and which first flew in 1966.

RTL inverter
A bipolar transistor switch is the simplest RTL gate (inverter or NOT gate) implementing logical negation. It consists of a common-emitter stage with a base resistor connected between the base and the input voltage source. The role of the base resistor is to expand the very small transistor input voltage range (about 0.7 V) to the logical "1" level (about 3.5 V) by converting the input voltage into current. Its resistance is settled by a compromise: it is chosen low enough to saturate the transistor and high enough to obtain high input resistance. The role of the collector resistor is to convert the collector current into voltage; its resistance is chosen high enough to saturate the transistor and low enough to obtain low output resistance (high fan-out).

One-transistor RTL NOR gate


With two or more base resistors (R3 and R4) instead of one, the inverter becomes a two-input RTL NOR gate (see the figure on the right). The logical operation OR is performed by applying consecutively the two arithmetic operations addition and comparison (the input resistor network acts as a parallel voltage summer with equally weighted inputs and the following common-emitter transistor stage as a voltage comparator with a threshold about 0.7 V). The equivalent resistance of all the resistors connected to logical "1" and the equivalent resistance of all the resistors connected to logical "0" form the two legs of a composed voltage divider driving the transistor. The base resistances and the number of the inputs are chosen (limited) so that only one logical "1" is sufficient to create base-emitter voltage exceeding the threshold and, as a result, saturating the transistor. If all the input voltages are low (logical "0"), the transistor is cut-off. The pull-down resistor R1 biases the transistor to the appropriate on-off threshold. The output is inverted since the collector-emitter voltage of transistor Q1 is taken as output, and is high when the inputs are low. Thus, the analog resistive network and the analog transistor stage perform the logic function NOR.

Multi-transistor RTL NOR gate


The limitations of the one-transistor RTL NOR gate are overcome by the multi-transistor RTL implementation. It consists of a set of parallel-connected transistor switches driven by the logic inputs (see the figure on the right). In this configuration, the inputs are completely separated and the number of inputs is limited only by the small leakage current of the cut-off transistors at output logical "1". The same idea was used later for building DCTL, ECL, some TTL (7450, 7460), NMOS and CMOS gates.

Transistor bias
To ensure stability and predictable output of the bipolar transistors their base-inputs (Vb or base-terminal voltage) is biased.

Advantages
The primary advantage of RTL technology was that it used a minimum number of transistors. In circuits using discrete components, before integrated circuits, transistors were the most expensive component to produce. Early IC logic production (such as Fairchild's in 1961) used the same approach briefly, but quickly transitioned to higher-performance circuits such as diode–transistor logic and then transistor–transistor logic (starting in 1963 at Sylvania Electric Products), since diodes and transistors were no more expensive than resistors in the IC.

Limitations
The disadvantage of RTL is its high power dissipation when the transistor is switched on, by current flowing in the collector and base resistors. This requires that more current be supplied to and heat be removed from RTL circuits. In contrast, TTL circuits with "totem-pole" output stage minimize both of these requirements.

Another limitation of RTL is its limited fan-in: 3 inputs being the limit for many circuit designs, before it completely loses usable noise immunity. It has a low noise margin. Lancaster says that integrated circuit RTL NOR gates (which have one transistor per input) may be constructed with "any reasonable number" of logic inputs, and gives an example of an 8-input NOR gate.

A standard integrated circuit RTL NOR gate can drive up to 3 other similar gates. Alternatively, it has enough output to drive up to 2 standard integrated circuit RTL "buffers", each of which can drive up to 25 other standard RTL NOR gates.

Speeding up RTL
Various companies have applied the following speed-up methods to discrete RTL.

Transistor switching speed has increased steadily from the first transistorized computers through the present. The GE Transistor Manual (7th ed., p. 181, or 3rd ed., p. 97 or intermediate editions) recommends gaining speed by using higher-frequency transistors, or capacitors, or a diode from base to collector (parallel negative feedback) to prevent saturation.

Placing a capacitor in parallel with each input resistor decreases the time needed for a driving stage to forward-bias a driven stage's base-emitter junction. Engineers and technicians use "RCTL" (resistor-capacitor-transistor logic) to designate gates equipped with "speed-up capacitors". The Lincoln Laboratory TX-0 computer's circuits included some RCTL. However, methods involving capacitors were unsuitable for integrated circuits.

Using a high collector supply voltage and diode clamping decreased collector-base and wiring capacitance charging time. This arrangement required diode clamping the collector to the design logic level. This method was also applied to discrete DTL (diode–transistor logic).

Another method that was familiar in discrete-device logic circuits used a diode and a resistor, a germanium and a silicon diode, or three diodes in a negative feedback arrangement. These diode networks known as various Baker clamps reduced the voltage applied to the base as the collector approached saturation. Because the transistor went less deeply into saturation, the transistor accumulated fewer stored charge carriers. Therefore, less time was required to clear stored charge during transistor turn off. A low-voltage diode arranged to prevent saturation of the transistor was applied to integrated logic families by using Schottky diodes, as in Schottky TTL.