Talk:ARM architecture family/Archive 4

When does a CPU Architecture become a Company Marketing Bio?
In this article, apparently. I can't tell where the discussion of ARM processors and ARM Holdings begins and ends. They are NOT the same thing. This article should focus strictly on the devices and architecture, NOT the company and it's history. There should be a separate article for the company itself. This is blatant corporate promotion. 98.194.39.86 (talk) 15:59, 13 July 2017 (UTC)


 * I agree, and they are still doing it. I searched for "Advanced RISC Machine" and I got Arm Holdings. Sam Tomato (talk) 01:13, 8 February 2018 (UTC)


 * That's broken. I fixed Advanced RISC Machine to go to ARM architecture rather than Arm Holdings; Acorn RISC Machine went to ARM Ltd for about an hour and a half after a move before it was fixed to go to ARM architecture. Guy Harris (talk) 01:35, 8 February 2018 (UTC)

Why is Cortex (only) mentioned in the 32-bit architecture infobox
Why is Cortex (only) mentioned in the 32-bit architecture infobox? The ARM Cortex-A implements the 64-bit architecture. Also ARM and other companies that have implemented the architectures of the 32-bit variety that aren't called Cortex, see List of ARM microarchitectures. Jonpatterns (talk) 18:11, 22 April 2018 (UTC)
 * EDIT Most of the ARM cores using non-Legacy architecture are called Cortex. But the point regarding other companies stands (List_of_ARM_microarchitectures). To my mind why mention Cortex in the infobox that is for Architecture when Cortex just an example of an implementation. Jonpatterns (talk) 18:19, 22 April 2018 (UTC)


 * The 32-bit infobox was split into two infoboxes, tagged "(Cortex)" and "(Legacy)", in this edit.  why was the infobox split (and why was the "v6-M and v7-and-later" box was tagged "(Cortex)")?  I'm not convinced it needed to be split at all; yes, v7 introduced new features, but so did earlier new versions.  Furthermore:


 * much of the stuff is duplicated in the two infoboxes;
 * the "Extensions" differ, but Thumb-2 and DSP, whilst only in the "Cortex" infobox, actually appeared in earlier versions of the architecture;
 * this page suggests that VFP also appeared in earlier versions of the architecture;


 * so maybe the correct fix is to put the two 32-bit infoboxes back together. Guy Harris (talk) 18:57, 22 April 2018 (UTC)

SVE and Fujitsu
My believe is that the main developer of SVE is not just ARM, but also Fujitsu, and SVE is heavily influenced by AVX-512, by extending it further to allow variable vector length, and by Fujitsu's previous HPC processor based on Sparc architecture. I have seen many presentations by Fujitsu on SVE, and their development of their own compiler that is automatically vectorizing code to use with SVE, but I actually do not know if SVE was defined by ARM before that, or Fujitsu cooperated with ARM to develop the instruction set itself. 2A02:168:F609:0:DA58:D7FF:0:F02 (talk) 15:00, 16 December 2018 (UTC)

Requested Addition by Arm
Hello, I work for Arm. I would like to request an addition to this page, as it currently makes no mention of the PSA, a crucial part of the Arm architecture.

The suggested addition is:

Platform Security Architecture

Platform Security Architecture (PSA) is an architecture-agnostic security framework intended to help secure Internet of Things (IoT) devices built on system-on-a-chip (SoC) processors. It was introduced by Arm in 2017 at the annual TechCon event and will be first used on Arm Cortex-M processor cores intended for microcontroller use. The PSA includes freely available threat models and security analyses that demonstrate the process for deciding on security features in common IoT products. The PSA also provides freely downloadable application programming interface (API) packages, architectural specifications, open-source firmware implementations, and related test suites.

Thanks! 217.140.106.54 (talk) 15:24, 6 March 2019 (UTC)

software operating system
one who took the Public Domain — Preceding unsigned comment added by 49.147.33.51 (talk) 05:04, 17 June 2019 (UTC)

ARMv8.3-A and the new FJCVTZS instruction
In Section ARMv8.3-A: "Improved JavaScript data type conversion support (AArch64 and AArch32); e.g. the new FJCVTZS instruction sets a flag when the conversion to 32-bit signed integer is exact, excluding −0, so that the next instruction can branch in this case."

Actually the main feature for JavaScript is that one gets a result modulo 232 (e.g. useful for the bitwise operations). Even though the source mentions the flag for exactness and its usefulness for JavaScript, I couldn't find in the ECMAScript standard where this flag can be used (even though one can imagine code that may use this flag as an optimization... but probably never in practical code). Vincent Lefèvre (talk) 15:58, 11 July 2019 (UTC)

A Commons file used on this page has been nominated for deletion
The following Wikimedia Commons file used on this page has been nominated for deletion: Participate in the deletion discussion at the. —Community Tech bot (talk) 15:24, 17 January 2020 (UTC)
 * Android Q Beta6 screenshot.png

Missing Operating Systems
I'd like to see a listing for postmarketOS. RichMorin (talk) 19:07, 22 August 2020 (UTC)

Logo
Is the logo actually for the ARM architecture, or is it just the logo of Arm Holdings? 120.159.128.133 (talk) 14:03, 9 October 2020 (UTC)

Page name
Why has this page been renamed from "ARM architecture" to "ARM (architecture)"? I'm surprised because this doesn't follow the usual names in Category:Instruction set architectures, such as Clipper architecture, IBM System/360 architecture, Mill architecture, MIPS architecture, PDP-11 architecture, IBM POWER instruction set architecture, TRIPS architecture, Unisys 2200 Series system architecture. — Vincent Lefèvre (talk) 22:45, 9 October 2020 (UTC)
 * And the only comment on the contested move appears to have been negative. Guy Harris (talk) 22:55, 9 October 2020 (UTC)


 * It's x86, x86-64, RISC-V, PowerPC, SPARC, etc. not x86 architecture, x86-64 architecture, RISC-V architecture, PowerPC architecture, SPARC architecture. Those articles you listed should also be moved. WP:BRACKETDIS. 123.208.92.76 (talk) 04:04, 10 October 2020 (UTC)

Requested move 10 October 2020

 * The following is a closed discussion of a requested move. Please do not modify it. Subsequent comments should be made in a new section on the talk page. Editors desiring to contest the closing decision should consider a move review after discussing it on the closer's talk page. No further edits should be made to this discussion. 

The result of the move request was: Not moved. -- Calidum 02:44, 22 October 2020 (UTC)

ARM architecture → ARM (architecture) – minor nitpick: disambiguator in brackets 120.159.128.133 (talk) 13:39, 9 October 2020 (UTC)
 * This is a contested technical request (permalink). Anthony Appleyard (talk) 05:27, 10 October 2020 (UTC)


 * queried move request Anthony Appleyard (talk) 05:29, 10 October 2020 (UTC)
 * Why has this page been renamed from "ARM architecture" to "ARM (architecture)"? I'm surprised because this doesn't follow the usual names in Category:Instruction set architectures, such as Clipper architecture, IBM System/360 architecture, Mill architecture, MIPS architecture, PDP-11 architecture, IBM POWER instruction set architecture, TRIPS architecture, Unisys 2200 Series system architecture. — Vincent Lefèvre (talk) 22:45, 9 October 2020 (UTC)
 * And the only comment on the contested move appears to have been negative. Guy Harris (talk) 22:55, 9 October 2020 (UTC)
 * It's x86, x86-64, RISC-V, PowerPC, SPARC, etc. not x86 architecture, x86-64 architecture, RISC-V architecture, PowerPC architecture, SPARC architecture. Those articles you listed should also be moved. WP:BRACKETDIS. 123.208.92.76 (talk) 04:04, 10 October 2020 (UTC)
 * In the case of System/360, for example, the IBM System/360 was a family of computers; it had an instruction set architecture, defined by the IBM System/360 Principles of Operation manual. Calling that instruction set architecture the "IBM System/360 architecture" doesn't appear to be an error to me; it's a particular characteristic of line of computers.  The same applies to the PDP-11 and the Unisys 2200 series, although the line of computers is the UNIVAC 1100/2200 series, and that page also covers some older UNIVAC machines with "11xx" model numbers, as well as the line that started with the 1108.
 * IBM System/370 covers both the family of computers and its instruction set architecture. IBM System/390 does the same.  z/Architecture covers the instruction set architecture (the name of which explicitly includes the word "Architecture"); there are separate pages for 1) the microprocessors that implement it and 2) the systems built from those microprocessors.
 * Clipper architecture is a page that covers both the Clipper line of chips and its instruction set architecture; arguably, it should be called "Clipper (microprocessor family)". This would be similar to, for example, the VAX page, which has a section describing the instruction set, but which covers more than just the instruction set.  SPARC is another such page, as are RISC-V and PowerPC.
 * MIPS architecture covers the instruction set; MIPS architecture processors and List of MIPS architecture processors cover the implementations.
 * ARM architecture covers the instruction set, with all of its different versions, profiles, "execution states" ("AArch32" and "AArch64", although they don't call them "application architectures" or whatever "AArch" is supposed to stand for), and instruction sets (AArch32, and the only execution state of pre-ARMv8-A processors, support the 32-bit ARM instruction set, called "A32" for ARMv8-A, and may also support the Thumb and Thumb-2 instructions, called "T32" for ARMv8-A - the R and M profiles are different there - and AArch64 supports the 64-bit A64 instruction set), although some of it has been moved into AArch64. There are various pages covering ARM's and other vendors' implementations of the architecture.
 * WP:BRACKETDIS points to the same section that WP:NATURALDIS, WP:COMMADIS, and WP:DESCRIPDIS point to (and, in fact, I think the correct link is WP:PARENDIS, as they list that, not WP:BRACKETDIS, under "Policy shortcuts"). The first choice they offer for disambiguation is "Natural disambiguation", and this seems to fit this case and the other "XXX architecture" cases. Guy Harris (talk) 05:28, 11 October 2020 (UTC)


 * Note that this is related to ambiguity with the architectural firm ARM Architecture (company), which in the past has also been titled Ashton Raggatt McDougall and ARM Architecture (Ashton Raggatt McDougall). Ivanvector (Talk/Edits) 13:49, 12 October 2020 (UTC)

Update desperately needed
As of right now, this article describes the "now" as it was in 2011, at the latest, with ARM being described as a 32-bit architecture. It then mentions in the lead that it has been announced that 64-bit architecture is coming in the ARMv8-A. The entire ARM architecture section is a series of announcement after announcement, over a period of years, of successive plans for the ARMv8-A, giving the impression that the company keeps announcing things one after another without ever actually accomplishing any of it. If these things have occurred, then the series of events should describe what has been released; after innovations have been released, it's no longer relevant to tell us that they were announced. And the lead should reflect the current state of the architecture, not what it was seven years ago. Largoplazo (talk) 11:54, 22 April 2018 (UTC)
 * I think there may be confusion over the 'announcements'; because ARM does not manufacturer chips it just designs. Perhaps the announcements are stating a design is complete, hence its part of the job is done. It could be useful to state which manufacturers have created chips based on each of the designs. Jonpatterns (talk) 12:17, 22 April 2018 (UTC)
 * I see your point, I think, but then it would be clearer to indicate that new specs have been "released". And the lead still speaks of the 32-bit architecture as the current state of the technology. Largoplazo (talk) 12:25, 22 April 2018 (UTC)
 * I've updated the lede to make it clear that 64-bit is now support by ARMv8. To my knowledge all the architectures feature 32bit length instructions, including ARMv8 which has 64-bit addressing and arithmetic. The only exception being the Thumb which can use 16-bit length instructions. Jonpatterns (talk) 13:07, 22 April 2018 (UTC)
 * 32-bit is still current. It's a little confusing because there are two main instruction sets, AArch32 and AArch64. When ARMv8 was released it was believed to be the new 64-bit version, keeping compatibility with AArch32 too, but some ARMv8, i.e. the later ARMv8-R are only 32-bit. That is, all the microcontrollers are still only 32-bit (Thumb is however a complication, and yes, with 16-bit instructions). comp.arch (talk) 21:49, 10 October 2018 (UTC)


 * Confusingly, there's:


 * the "Arm architecture", which incorporates:
 * the CPU architecture, which has three profiles (A, R, and M, nudge nudge wink wink) and multiple versions (currently 6, 7 and 8);
 * multiple system architectures;
 * multiple security architectures;
 * three instruction sets - A32 (the 32-bit-instruction/32-bit-data-and-addresses ISA, descended from the original ARM ISA), T32 (the variable-length-instruction/32-bit-data-and-addresses ISA, descended from Thumb and Thumb2), and A64 (the 32-bit-instruction/64-bit-data-and-addresses ISA).


 * The A profile of ARMv8 has, in addition, two "execution states", AArch64 and AArch32. AArch64 includes:


 * "The AArch64 Application Level Architecture";
 * "The AArch64 Instruction Set", which is A64;
 * "The AArch64 System Level Architecture";


 * and AArch32 includes:


 * "The AArch32 Application Level Architecture";
 * "The AArch32 Instruction Sets", plural, which are T32 and A32;
 * "The AArch32 System Level Architecture".


 * ARMv7-A and ARMv7-R have two instruction sets, "ARM" and "Thumb"; "Thumb" includes Thumb-2. ARMv6, apparently, is similar, but Thumb-2 is an extension. Guy Harris (talk) 19:31, 12 January 2019 (UTC)


 * ARM64 Microsofts release of .NET 5.0 includes ARM64 support now gives their 5 million programmer base access to compile on this instruction set. If anyone out there has deeper knowledge of ARM64 instruction set now is the time to create a spinoff page describing the instruction set.  TheKevlar 13:20, 15 November 2020 (UTC)

December 2020 edit
After completing the creation of the PSA Certified page, I am looking to update outdated information elsewhere on Wikipedia. A revised version of the Platform Security Architecture subsection of this page has been rewritten and expanded [Platform Security Architecture at user:RichardDigital47/sandbox. Please also view my userpage to read my COI declaration.RichardDigital47 (talk) 21:42, 9 December 2020 (UTC)


 * ✅ Ferkijel (talk) 10:33, 28 March 2021 (UTC)

Wikipedia is not an indiscriminate collection of information
Per What Wikipedia is not I propose that we nuke the multiple long lists of operating systems. If someone wishes to split out a new article List of operating systems that support the ARM architecture from out of List of operating systems, they are free to do so, but the reality is that there are now very few operating systems that don't support ARM. --Guy Macon (talk) 14:43, 9 May 2021 (UTC)
 * I agree. IMHO, this should be transformed into a text saying how this evolved in the history. And perhaps list the operating systems specifically designed for ARM (with some explanations). — Vincent Lefèvre (talk) 15:22, 9 May 2021 (UTC)

ARM-based chips and Intel
I doubt that in ARM architecture, paragraph "Companies that have developed chips with cores designed by Arm Holdings [...]", the mention of Intel is correct. There is no source and the only ARM-based chips listed in Template:Intel processors are StrongARM and XScale, whose cores have been designed by DEC and Intel respectively (the latter being a redesign or the former). The article Intel will start building ARM-based smartphone chips (The Verge, August 2016) mentions a licensing agreement with ARM to "produce ARM-based chips in Intel factories", but this does not mean chips developed by Intel itself, but rather by other companies. Vincent Lefèvre (talk) 10:11, 29 December 2019 (UTC)

The Intel Stratix 10 Hard Processor System Technical Reference Manual explicitly calls out ARM_Cortex-A53 being used in the FPGA's hard processor system (HPS), which is ARM IP, yes? The ARM core is part of the fabric die, which is manufactured by Intel. All densities in the Stratix 10 family will be available with an integrated 64-bit ARM quad-core Cortex -A53 hard processor system (HPS). Intel has been fabbing ARM-designed cores as part of Stratix 10 since before Altera was acquired in 2015. What's unclear is if Intel has utilized the architectural license to build any processors adhering to the ARM architecture outside of StrongARM and XScale. Tfinn (talk) 05:08, 21 October 2021 (UTC)