Talk:Control register

=Merge from Control Registers= I say that these topics are completly identical, and should be merged. --Black Phoenix 16:28, 11 June 2006 (UTC)

=Task Switch= The explanation for bit 3 of CR0 is confusing. Please rewrite it. Jangirke (talk) 01:58, 30 March 2009 (UTC)
 * Done. 50.53.15.59 (talk) 13:02, 23 January 2013 (UTC)

Vandalism
Hello, since several months there has been an attack on this article, which acknowledges the presence of a "XAAD" in Xcr0 Bit 13 when this is obviously false, because it isn't mentioned in the Intel manuals, nor in the AMD ones. I request this article's security level to be raised. Atie5173 (talk) 19:18, 19 May 2021 (UTC)

Name and scope
If this article is intended to reflect only Intel X86 then the title should reflect that. Otherwise, it should include examples from other processor lines, e.g., IBM S/370 through IBM Z. -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 13:00, 7 May 2023 (UTC)
 * Given that this article has a sections titled "Control registers in x86 series", it would appear that the intent is not to discuss only x86 control registers, so feel free to add information about S/3x0 or any other instruction set that has registers whose purpose is to control instruction set or processor features.  If anybody objects that this article is for x86 control registers, then we can rename the article appropriately. Guy Harris (talk) 21:51, 7 May 2023 (UTC)
 * OK, I've started making changes but I've run into a snag. I added a Notes section with notelist and realized that CR4 also had a notelist. I tried adding a IntelCR4 to the notelist and efn in CR4, but the note in History still was rendered in CR4 rather than in Notes. As a stopgap, I've changed my markup to notetag and notefoot. I'll try to complete the details for S/360 through z/Architecture, but I'm hoping that someone will add other product lines. -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 13:43, 8 May 2023 (UTC)

Organization
The article currently has a subsection for each control register. I believe that will become increasingly unwieldy as data on other architectures are added. I propose folding the CR subsections into rows of a table for each architecture. Thoughts? -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 19:21, 23 May 2023 (UTC)
 * That might work. It might mean less detail about the individual control registers, but that's what the architecture and processor manuals are for. Guy Harris (talk) 20:21, 23 May 2023 (UTC)