Talk:DDR2 SDRAM

Rerouting the DDRII redirect
A game was recently announced at E3 called Dance Dance Revolution II (DDRII for short). I've never seen DDR2 referred to as DDRII, so I think DDRII andDDR II should redirect to Dance Dance Revolution II (I will create the page within 12 hours, either on its own or under my name). Hooky-i-vanisher (talk) 21:44, 10 June 2011 (UTC) Went ahead and made the change; it redirects to the main Dance Dance Revolution page for now. I'm going to add redirect notes right now. Hooky-i-vanisher (talk) 00:41, 11 June 2011 (UTC) "Made the Dance Dance Revolution II page, DDRII and DDR II now redirect there with a note about this article. Hooky-i-vanisher (talk) 06:58, 11 June 2011 (UTC)"

In regards to graphics cards
I changed the History section in regards to graphics cards. The use of DDR-II had nothing to do with the high power useage on the nVidia Geforce FX 5800-series, that was due entirely to the design of the GPU. Also, the article was referring to the Radeon 9800 Pro, not the Radeon 9800. Oh, and I forgot to log in before I edited, those changes were mine.Alereon 23:39, Nov 8, 2004 (UTC)

explain of the pump 4 data question
Let me explain the pump 4 data question: DDR2 does output 2 data each clock cycle, same as DDR. However, the memory chip, which save the data is running at 1/4 of the clock speed.

say our memory chip can run at 100MHz. the chip will output a data bit at each clock rising edge. Then 2 of the lower speed memory chips will compound to one data line and output data at double data rate 200MHz according to DDR I spec. Internally two chip will output 2 bit data at each rising edge of the 100MHz clock. However, one of them is delayed half period and was output at falling edge of the 100MHz. So the actually data rate was doubled to 200MHz with a 100MHz memory bus. EX: DDR 400 = PC-3200: internal memory chip run at 200MHz, memory interface runs at 200MHz. Double data rate = 400MHz = 4 * 8bits/byte = 3200

For DDRII, same as DDR I. it will output data at both rising and falling edges and still called as Double data rate, not quart_data_rate! However, the internal memory chip runs at 1/4 of the frequency. EX: DDR II 400, memory chip runs at 100MHz, interface runs at 200Mhz (same as DDR 400), on both rise/fall edges of 200MHz it output 1 bit data. However, since memory chip can only run at 100MHz, it need 4 memory bits to combine into one data line (otherwise we don't have enough data!)

Two conclusion: 1, DDR II 400 is lot cheaper than DDR I 400; even DDR II 667 may be cheaper than DDR I 400. the most expensive part is internal memory chip, not the interface part. 2, DDR II 400 need wait for more time to send first data compared with DDR I 400 since its internal memory chip runs at half of the speed of DDR I 400. Even more, DDR II 800 may need more time to send its first data when received the address/command compared with DDR I 400 since it has complex interface.

For random memory access, even you have higher data rate, the CPU may only need one data and have to wait longer in DDR II 800 compared with DDR I 400. So in the very earlier date the DDR I 400 may reach better performace than DDR II 800. If I can pick, I will pick DDR I 400, not DDR 2-667

Yes, we can improve the software and chache etc to make DDR II better and today's DDR II's price drop a lot. However, I really doubt the DDR III. It use 1/8 memory chip and have supper big latency. Also, the higher speed interface cost more money and cause more trouble. If I say, its only benifit is power saving.

Plumber1997: June 12, 2007

Backwards Compatibility (Confusing and Inaccurate)
Referring to compatibility between two DDR2 modules running at seperate clock speeds, would simply result in the system using the lowest clockspeed module's specs. The section does try to define this, but then divulges in to provided some very confusing explanations, for example: "Slower DDR2 memory are not compatible with faster memory.

IE. You can put a PC2-6400 module in a PC2-4200 compatible system, but you cannot put a PC2-4200 module in a PC2-6400 system."

What is that supposed to mean? All DDR2 modules are compatible as long as they are supported by the motherboard.

backwards compatibility 2 ?
Is it possible to put a PC2-5300 into a computer specified for PC2-3200? Will it work, only slower? How about adding a PC2-5300-stick to a computer where there is already a PC2-3200 when upgrading? And finally, is it possible to mix memory sticks with different Cas Latencies?

I found this page very informative on whether memory is backward compatible. According to this page, PC2-8000 is backward-compatible for PC2-4200, PC2-5300, and PC2-6400. http://www.crucial.com/library/memory_speeds.asp

Backward Compatibility 3
Does adding a DDR2-800 PC2-6400 RAM into a laptop (Acer Aspire 5100) that takes DDR2-667 PC2-5300 have any disadvantages? Or is a DDR2-800 PC2-6400 backward compatible in this sence and will it work fine?

Thank you, Laurens,

PS. Where can I check what my motherboard takes? Is there an online scanner? —Preceding unsigned comment added by LAUBO (talk • contribs) 12:18, 4 August 2009 (UTC)

backwards compatibility ?
It is not ok to put a DDR-2 piece of RAM in a motherboard that is only designed for DDR-1, I tried it and my motherboard got fried. Also, it didn't fit right away, so I had to use some force.

ps: It could depend on your motherboard if it gets fried or not
 * You should read in your motherboard specifications whether or not it supports DDR2. For example in the manual for my A7V600-X they tell me that it has three DDR DIMM sockets that supports up to 3GB unbuffered non-ECC PC3200/2700/2100 DRR DIMM's. It also only supports up to two PC3200 DIMM's at once. It clearly has no support for DDR2. It is also followed by a qualified vendor list where Kingston, the vendor of my DIMM's, isn't listed; but I use them anyway since I trust that there wont be any complications. I'm sorry to say I don't know whether or not a DDR2 compatible motherboard supports DDR as a standard though.


 * No, DDR and DDR2 are not intercompatible. The slots are physically different with notches on different places to prevent you from putting the wrong kind in. If you force through that it's not impossible you killed your motherboard with that move, rather than anything electrical. Some motherboards for Intel processors exist (notably in the AsRock product line) which have a set of DDR sockets as well as a set of DDR2 sockets, but they are fairly rare. Intel processors can have DDR or DDR2 (or older technologies with older processors), depending on the chipset, and some chipsets even support either -- but never in the same slots, it's the motherboard manufacturer that chooses which mode to use. AMD processors have, since the Athlon 64 introduction, had the memory controller inside the chip. Socket 754, 939, and 940 use DDR, Socket AM2 uses DDR2.

User:Jasper Janssen 23:41, 29 August 2006 (UTC)

wrong!
I think this page is wrong. DDR2 does NOT pump out 4 words/per clock - it pumps out 2 just like DDR. Take a look at Micron/Samsumg data sheets. The DDR2 advantage is that the clk can be increased over what DDR can handle due to design improvements (ODT, lower voltage, FBPGA, etc)

-- Pete


 * Apparently, though, the memory clock for DDR2 runs at half the external IO clock (which is what's generally referred to as the clock speed), and that is what allows DDR2 to hit frequencies about double those of DDR. So DDR2 pumps out 1 word per clock flank of the IO bus, or 2 per clock, but that equates to *4* per memory clock. This neatly explains, once you grok it, both the higher latencies (there's more buffering needed to give that effect) and why DDR2 (modulo some process improvements) reaches just about double the top speeds of DDR. The article isn't all that clear about it though. User:Jasper Janssen 23:59, 29 August 2006 (UTC)


 * Actually, the concept of a "memory clock" is confusing. Modern DRAM is self-timed and more or less asynchronous in the core - the clocking happens only at the edges.  You could say that the column cycle length has not substantially reduced (which is true) but there is really no such thing as a memory clock. D3Jones 18:43, 28 March 2007 (UTC)

CONFUSSUED
can someone please explain which is faster DDR dual channel or DDR2 because i was reading the page and it said both DDR2-400MHz and DDR2-533MHz perform worse than their DDR equivalants. and i thought 400MHz was DDR not DDR2. anyways if anyone can work this out it would be very helpful
 * You can run both DDR and DDR2 at an effective clock of 400MHz; at that same speed, DDR2 will have somewhat lower performance, because the reduced memory clock will cause increased latency. The advantage of DDR2 is that the process improvements will eventually allow it to reach significantly higher interface speeds than DDR ever could. PC2-3200 will certainly be slower than PC-3200 dual-channel.

Article rename
I suggest renaming the article to "DDR2 SDRAM" to conform with the naming convention of DDR SDRAM. Any comments? --Fredrik Orderud 12:56, 14 May 2005 (UTC)


 * Article rename done. --Fredrik Orderud 14:50, 15 May 2005 (UTC)

Only 2 words per clock
The previous writer is correct. DDR2 can only send 2 words per clock. The improved electronics allow it to run faster, not quad-pumping. The article has been modified accordingly.

I don't get it
"Unlike SDR, DDR2 will transfer data on every rising and falling edge of the clock (double pumped), achieving an effective rate of 200 MHz with the same clock frequency. DDR2's clock frequency is further boosted" further boosted? does that mean it should say "Unlike SDR, DDR will transfer" and then "DDR2's clock frequency is further boosted"? or further compared to what?
 * Hmmm - needs some rewording. DDR2 is basically DDR1 with reduced voltages. I/O clock is separated and runs at doubled speed compared to the memory clock. --Denniss 21:11, 28 October 2005 (UTC)
 * How does it do that? Does it fetch 4 units of data on each memory clock (or 2 units per memclock flank), while pushing 1 out on each IO clock flank? I think this should probably be in the article -- it was what I was looking for, anyway.User:Jasper Janssen 23:44, 29 August 2006 (UTC)

I still don't get it.
"DDR2-400: DDR-SDRAM memory chips specified to run at 100 MHz, I/O clock at 200 MHz"

Is this right? The -400, if we're following similar conventions to DDR- naming implies 400M xfrs/second. Since the article implies DDR2 is basically DDR with an additional double-rate I/O clock, shouldn't the base rate be half the transfer rate--just as with DDR--or 200Mhz in this case, and the I/O clock equal the transfer rate (400 Mhz)? I may be just confused about something, but perhaps if I'm not just missing something already clearly stated, someone could elaborate this point in the article? Thanks. SimonFunk 17:33, 15 December 2005 (UTC)


 * DDR-400 runs memory and I/O with 200 MHz, DDR2-400 memory with 100 and I/O with 200 MHz. Neither of them runs with 400 MHz. --Denniss 18:51, 15 December 2005 (UTC)

Umm.. yeah that doesn't even make grammatical sense, I'm having trouble figuring out what you're trying to tell us. Dan 18:35, 14 January 2006 (UTC)
 * DDR-1 operates both memory chips and I/O with the same speed, DDR-2 has both speeds separated. DDR2 memory chips operate at half speed of I/O clock. I/O clock is the speed DDR2 is connected to a motherboard. PC-3200 (DDR1) operates both memory chips and I/O with 200 MHz, PC2-3200 (DDR2) operates memory chips with 100 MHz and I/O with 200 MHz. --Denniss 19:09, 14 January 2006 (UTC)

Lucid Speed Explanation
At X-bit labs the article DDR2 vs. DDR: Revenge Gained (page 2) explains it very well. There is also a nice picture. It is e.g. directly visible that the data bus speed is also "double pumped". So I/O with 200 Hz for the DDR2-400. Andy 15:13, 15 October 2006 (UTC)

Needs a re-write
I do layout and configuration of these things for a living.

DDR2 chips have a single (differential admittedly) clock called CK sort of corresponding to what the article calls I/O clock. I have no idea what "memory clock" is all about.

Data is transferred on both edges of CK. So 200MHz CK gives 400 MTransfers/s so if there are 64 bits throughput is 3200MB/s in a bursty intermittent way. —Preceding unsigned comment added by 86.9.123.140 (talk) 16:14, 22 April 2010 (UTC)

formatting of units
User:Angelic Wraith: Please note that, except in the case of obvious vandalism, it is extremely rude to revert an edit without explaining why in the edit summary. I have re-corrected the formatting as this is the correct style according to Wikipedia Manual of Style. If you wish to change this style policy then you should build a consensus first; either on this talk page but preferable in the Style Manual talk pages unless you think this article should have a different style from the rest of Wikipedia. --Ali@gwc.org.uk 09:32, 15 January 2006 (UTC)

I have explained. There are no professional sources which say "533 MHz," or "512 MB," they all say "533MHz," and "512MB." I don't understand why you insist upon putting a space; it not only looks amateurish and unprofessional, it's just plain wrong, and it takes up a bit more space- so to speak. Most Wikipedia articles do not have spaces. If I recall, you're the one who hasn't explained your reasoning for reverting my edits.

P.S., I can't find any MoS on this type of thing.. if you're willing to link me, I'll take a look.
 * All technical articles in wikipedia have this space (or at least should have). This is in all correct. --Denniss 01:12, 16 January 2006 (UTC)


 * see Manual of Style (dates_and_numbers), "The reader should see a space between the value and the unit symbol". --Ali@gwc.org.uk 10:43, 16 January 2006 (UTC)

This is unfortunate, and (as I see it) one of the shortcomings of Wikipedia. They undermine themselves by, while trying to make something more readable, making it look less professional. I'm not going to try to change it, nor argue about why it should be changed, despite Wikipedia's guidelines... obviously that would be pointless. I'm just saying I think it's incredibly foolish the way they do certain things. It's sort of like a supposedly professional website spelling "all right," as "alright," or "a lot" as "alot." It would be enough to turn away many users who have good background knowledge, looking for specific information, then seeing something as telling as this, and figuring it probably isn't of any use anyway, if I explained that at all well. Dan 23:37, 16 January 2006 (UTC)
 * It's rather unfortunate that Microsoft, Amazon and Anandtech are amateurish and unprofessional and plain wrong   (Anandtech uses both which I guess you could say is a bit amateurish and unprofessional). The truth is of course, it comes down to a matter of personal preference. Some people prefer one some the other. Both are equally acceptable unless your a bit silly. We have established a standard style and we're sticking to it... Nil Einne 11:22, 8 October 2006 (UTC)

Sticks and formats
The PC2-5400 definition was actually describing PC2-5300 (667MHz, 5.333GB/s throughput). PC2-5400 is 675MHz and 5.400GB/s. Added/corrected.

Mdeatherage 09:43, 29 January 2006 (UTC)

That may be. But that's how they're listed by companies. . . PC4200 is 4.266GBps... PC2700 is 2.666GBps. Dan 15:43, 30 January 2006 (UTC)

in my (neutral) opinion ... DDR2-667 - PC2-5300 DDR2-675 - PC2-5400 are two different thing. based on the incremental order (133MHz) of the DDR-2 RAMs mentioned here, article should contain the "PC2-5300" not the "PC2-5400". If Manufacturers are producing and marketting a better speed version (PC2-5400), thats good for them and users. But that doesn't change the standard speed/bandwidth levels passed and tested by JEDEC. Beside, as this article is discussing standards, it should contain PC2-5300. And, according to JEDEC standard, DDR2-667 is the next step of DDR2-533, not the DDR2-675. - Tarikash 19:48, 2 February 2006 (UTC)

They're not producing better memory, they're producing 667 memory and they call it PC2-5400. http://www.ocztechnology.com/products/ddr2/ for an example. User:Jasper Janssen 23:49, 29 August 2006 (UTC)

Improve overview
The second sentence in the first paragraph introduces SDRAM to serve as a point of contrast with regards to single edge/dual edge transfers. The way that introduction is made might confuse readers who are not familiar with the subject. It should be made clear to the reader that the second paragraph is describing a previous generation of RAM instead of making a sudden jump. Something like "'SDR-SDRAM', the memory technology prevalent before DDR, transfers data on..." or "In contrast, 'SDR-DDRAM'...". --216.254.64.3 05:11, 12 April 2006 (UTC)

so which is better?
So, if I can use pc3200 dual channel DDR or PC5300 dual channel DDR2, which one is going to perform better?


 * PC5300 will give you 5.333 Ghz/sec peak bandwidth. PC3200 will give you 3.200 Ghz/sec peak bandwidth.  However, you will suffer much higher latency with the DDR2 RAM.  So, it really depends on your workload.  Is latency going to dominate your workload or does your particular workload require lots of bandwidth?  In the end, you likely won't notice much difference between the two.  Also worth noting is that no motherboard, as far as I know, supports both DDR and DDR2 RAM.  --Yamla 23:05, 30 August 2006 (UTC)


 * Then you don't know mine, because it does. 2 pairs of DDR and 1 pair of DDR2 slots. "future proofed" motherboard that ultimately is self-defeating. TheHYPO 03:11, 31 August 2006 (UTC)
 * That's nothing new to have both types of slots but try to use DDR1 and DDR2 at the same time, either the memory or the board or both will fry. Similar to what happened to SDR/DDR boards like K7S5A. --Denniss 21:04, 31 August 2006 (UTC)


 * I don't recall suggesting that they worked at the same time... TheHYPO 07:55, 1 September 2006 (UTC)

Cleanup
I've added the cleanup tag as there's a lot of very awkward language and things that don't really belong. It needs a complete reorganization. --Dtcdthingy 14:35, 11 October 2006 (UTC)

5300/5400
There was a comment in the article that implies there's some conclusive discussion on the talk page of the 5300/5400. There is not. If you have any evidence that manufacturers are doing this out of malice/trickery or to imply their memory runs at 340MHz, please discuss it here (with sources) before adding it to the article. --Dtcdthingy 15:09, 12 October 2006 (UTC)
 * Specification standard is PC-3200. There's nothing to discuss. --Denniss 20:07, 12 October 2006 (UTC)
 * !?!!! --Dtcdthingy 20:19, 12 October 2006 (UTC)
 * Uups - should read PC2-5300 --Denniss 08:05, 14 October 2006 (UTC)

Capacity
Do all DDR2 slots have the same capacity? What decides how much RAM a slot can handle?

PC4300 semi-standard ?
Many RAM modules are marked as PC4300 on their labels.

The difference from PC4200 is that they surely works at 537MHz (PC3200 only is garanteed to work at 533MHz), this is tol on their labels and in the SPD as well.

I doubt it is official standard, but de facto is used often and i think is worth mentioning in the article.
 * That's just another marketing specification, sounds better and sells better than PC2-4200 (at least they think it sells better). --Denniss 17:19, 9 November 2006 (UTC)

Notebook SO-Dimm
How about adding one or two sentences about DDR2 Memory in Notebooks? Are there any differences to the "normal" modules? The number of pins at least differes (200 for SO-Dimms I think)

DDR2 1066
I believe that DDR2 1066 is an accepted standard now, not just a planned speed.

-RK 216.9.142.135 22:12, 20 March 2007 (UTC)
 * AFAIK it's still in the planning status at JEDEC. Although it seems to be standardized this year. --Denniss 09:45, 21 March 2007 (UTC)
 * why it need for standard? it sells already . And DDR2 1250 too --212.113.123.22 17:10, 17 April 2007 (UTC)
 * Please keep on official specification standards. Do not try to integrade all home-brewed "standards" introduced by several memory manufacturers. --Denniss 22:12, 17 April 2007 (UTC)

Refer to JESD208. It's been in standard since November 2007. Reinderien 17:39, 24 January 2008 (UTC)
 * While they seem to have set the standard for 1066, I don't think I've seen anything about SPD data for speeds above PC2-6400 yet. In fact, there are dimms being shipped today that are programmed with PC2-6400 SPD data even though they are being sold/marketted as PC2-8500 (1066MHz). --Benefros (talk) 20:27, 23 February 2010 (UTC)

Prefetch buffer?
What is the "prefetch buffer" mentioned in the DDR/DDR2/DDR3 articles? Can someone point me to the section in the JEDEC spec describing this? Although multiple bitlines can be read out on each read command, and the number of bitlines that contribute to a minimum-size read burst gets bigger with each new generation, is there any "prefetching" going on in the true sense of the word? It's more of a wide/slow internal read being transformed into a narrow/fast external I/O. Comments? D3Jones 18:47, 28 March 2007 (UTC)
 * Exactly. You can think of the following words in the burst as having been "prefetched".  That's the term the DRAM people like to use, although it means something slightly different in microprocessors.  71.41.210.146 23:25, 7 October 2007 (UTC)

Before DDR, SDRAM had the internal memory cell array directly connected to the data pins and ran at the same clock speed, 8bits fetched and 8bits sent. The internal clock could only be increased to 150MHz at the time so instead they doubled the width of the internal array and doubled the speed of the interface. Instead of fetching 1bit for each data pin per clock, DDR reads 2bits per data pin and then sends the first on the rising edge and the other on the falling edge (eg. 200MHz internal, 400MT/s data). DDR2 reads 4bits and takes 2 clocks to send the data but the external data clock is doubled in speed (200MHz internal, 800MT/s data). DDR3 similarly uses 8bits (200MHz internal, 1600MT/s data). They all use an internal buffer to read a large portion of memory read for several sequential reads. The buffer allows the internal array to save data, automatic page refresh or get address/commands and activate another page while transferring data from previous block. tygrus (talk) 05:50, 21 January 2010 (UTC)

Bus speeds aren't increased, only bandwidth.
This articale states in several places that the bus speed is increased in DDR/DDR2 ram. That is totally mistaken. The only thing increased is the data flow per per clock cycle with 2 bits with DDR and 4 bits with DDR2. PC133, PC2100, and PC2-4200 all have the same clock speed of 133MHz.


 * Not true. PC2-4200 has a bus clock of 266MHz, as listed in the article. DDR increases the data flow, as you say, but DDR2 increases the bus clock rate in addition.  Reddyuday (talk) 00:07, 17 July 2009 (UTC)

PC2-10000
There are many types of ram that exceed the DDR2 1066 ... the highest i have seen yet is the PC2-10000 with 1250Mhz clock, not to mention PC2-8800, PC2-8888, PC2-9000, PC2-9200. Are they not standardised enough to be mentioned in this article? OliverR 09:12, 16 May 2007 (UTC)
 * They are not standardized at all but home-brewed by memory module manufacturers (usually with excessive over-voltage). JEDEC has so far only standardized specification up to DDR2-800 and plans to standardize DDR2-1066 in the near future. --Denniss 19:10, 16 May 2007 (UTC)


 * I think it would still be good to have a section involving some of the nonstardards to let people know that they do exist at those speeds as well. Dvferret (talk) 13:47, 11 December 2007 (UTC)

There is a PC2-10400 manufactured by a company and being sold on NewEgg as retail. Shouldn't this be mentioned in the article table?

http://www.newegg.com/Product/Product.aspx?Item=N82E16820313009

--169.231.7.171 (talk) —Preceding comment was added at 07:41, 19 February 2008 (UTC)

BGA packaging is superior to TSSOP
The Overview section discusses the move from a TSSOP package to a BGA package, and indicates that the move was for improved signal integrity. There is a [citation needed] beside it. I don't understand why. BGA has better signal integrity than TSSOP; it's just a fact. Even the Xilinx datasheets for their FPGAs suggest using BGA packages for signal integrity purposes; the main disadvantage to BGA is the escape routing the PCB designer needs to do, which will require a board with many layers.

If the concern is over the phrase "the change was necessary", then perhaps some different language could alleviate that. Something akin to "BGA packaging was chosen for its superior signal integrity when compared with the TSSOP packaging of the previous generation of DDR chips." A goal of DDR2 was to increase the bandwidth of the data pins, though, so of course better signal integrity will be "necessary" for higher bandwidths. 151.201.138.136 14:55, 7 June 2007 (UTC) anonymous computer engineer

buffered, fully buffered registered
can someone explain the difference between these? from experience registered is not the same as fully buffered, but this article makes buffered and registered seem the same?--87.127.117.246 16:22, 28 July 2007 (UTC)
 * Buffered ist the old name for registered modules. Do nut mix it with Fully Buffered DIMMs. --Denniss 18:15, 28 July 2007 (UTC)

This article on other sites
Hrm. answers.com copied this article word-for-word, a direct copy and paste. I'm not sure on wikipedia's stance on that or whatever, just thought I'd throw that out there... —Preceding unsigned comment added by 24.206.252.4 (talk) 03:39, 30 September 2007 (UTC)
 * Wikipedia pages are available under the CC-BY-SA and GNU FDL. As long as they comply with the terms, they can copy and redistribute all they like. I took a quick glance, at it appears that they are complying. (Or at least, they have the required notice, with a link to the license.) Jobarts-Talk 02:32, 27 August 2009 (UTC)

How do cpu fsb and memory clock speeds relate?
How can DDR2 667 ram supply enough bandwidth for a 1,333MT/s cpu if it only has a capacity of 667MT/s like the article says?

As far as I knew DDR2 667 ram was 1,333MT/s with an I/O bus speed of 667MHz and memory cell speed of 333.5MHz, because the Intel Core 2 cpus that run at 1,333MT/s have an fsb clock speed of 333.5MHz which would be exactly the same as the ram, and when multiplied by the cpu multi gives the cpu's clock speed. That makes perfect sense to me. 90.200.150.98 (talk) 16:34, 22 November 2007 (UTC)

DDR2 different version together
If I put DDR2-533 and DDR2-667 on same board, will there be significantly low performance or will they work just fine together? --Fotte (talk) 10:31, 29 October 2008 (UTC)
 * They should work together but only at the speed of the slowest memory stick thus the DDR2-667 operates at DDR2-533 speed. --Denniss (talk)

I believe last sentance of intro is wrong
I believe that the last sentence of this paragraph is wrong: Its primary benefit is the ability to operate the external data bus at twice the data rate of DDR SDRAM. This is achieved by improved bus signaling, and by operating the memory cells at half the clock rate (one quarter of the data transfer rate), rather than at the clock rate as in the original DDR. A DDR2 memory operated at the same clock rate as DDR will provide the same bandwidth but markedly higher latency, providing inferior performance. I believe that either of the following two versions of this sentence would be correct: A DDR2 memory operated at the same external data bus clock rate as DDR will provide the same bandwidth but markedly higher latency, providing inferior performance.

OR

A DDR2 memory operated at twice the external data bus clock rate as DDR will provide twice the bandwidth with the same latency. I think I am right about this and the problem is mostly wording so I am going to make this edit to the main article. Please discuss and correct here if you think I am wrong on this point. Lbecque (talk) 18:51, 4 December 2008 (UTC)

OK here is the version I decided to use in the main article:

A DDR2 memory operated at the same external data bus clock rate as DDR will provide the same bandwidth but markedly higher latency, providing inferior performance, since the memory cells are operating at half the rate. Alternatively, a DDR2 memory operated at twice the external data bus clock rate as DDR can provide twice the bandwidth with the same latency. Lbecque (talk) 19:41, 4 December 2008 (UTC)

Modules beneath the standard?
What's the deal with modules sold as 5200 (below the 5300 standard) or 6300 (below the 6400 standard)? Are these chips designated as "value" options for people who don't mind bad ram? Otherwise what would be the point to them? 76.254.67.134 (talk) 04:02, 14 December 2008 (UTC)

Introductory paragraph
I have edited the introductory paragraph because I found the original version confusing and inconsistent. Soon afterwards, an anonymous editor from 72.67.61.142 reintroduced the erroneous statement "DDR2 SDRAM achieves 2 data transfers per memory clock cycle". The statement is factually false. DDR2 achieves 4 transfers per memory clock cycle, not 2. Please don't edit the paragraph before reading the whole article and digesting it. You might also want to register and login first, if you are to be taken seriously. Reddyuday (talk) 14:23, 16 July 2009 (UTC)

In addition ... DDR2 employs an I/O buffer
Tried to fix up the first paragraph even better... 2 problems: it implied that DDR did not employ an I/0 buffer, and the term "memory clock" was ambiguous. Which also lead to confusion in the next sentence: "The two factors combine", and in the following paragraph "half the bus speed". As has been noted earlier, DDR1 does not run "at the bus speed" internally: it's not "clocked" that way. And the IO clock has to run a double rate, for both DDR1 and DDR2.

So I've just said that DDR2 is clocked at half the rate of DDR1, which sort of gives the correct idea without being specifically wrong.203.206.162.148 (talk) 09:25, 5 January 2010 (UTC)siyo kweli maana sisi wote hatujui na ndo maana tunajifuzs

Why is GDDR2 redirected to DDR2 ?
There is a large sequence of memory standards for graphics cards (GDDR, GDDR2, GDDR3 ..) that are similar but independent of the JEDEC standard DDR series. The GDDR# specifications/implementations were designed by different groups and are not 1:1 with JEDEC standards. The GDDR# series borrow ideas from DDR# but the interface specification are designed for higher speeds and a close/direct connection to a controller (GPU host, 1 chip per channel). GDDR# cannot be mounted on modules and used as main memory because tolerances and address bus are different. PC main memory has several chips per module and several modules per channel at different distances. A new article should summarise the early GDDR versions and link to the current GDDR3, GDDR4, GDDR5 pages.

GDDR is similar to DDR but came out before DDR.

GDDR2 is simlar to DDR2 but came out before DDR2.

GDDR3 is similar to DDR2 but came out after DDR2 with some improvements.

GDDR4 is similar to DDR3 but with different addressing.

GDDR5 is similar to DDR3 but with the address bus, termination, delay compensation and tuning are all different.

It would take a lot of time to research the exact specifics and identify differences. It is also confused by some graphics cards to use standard PC memory chips as used on DDR, DDR2 and now DDR3 modules (without the ‘G’). tygrus (talk) 05:50, 21 January 2010 (UTC)


 * The subsection that talked about GDDR2 was removed in this revision because it had no sources. But this caused the redirect from GDDR2 (and the GDDR2 link at the navigation table at bottom of the page) to no longer make sense.
 * I like your idea for a unified GDDR page. There's some info on GDDR2 in the history link above. WCEngineer (talk) 05:01, 1 March 2010 (UTC)

svg image with notch position is incorrect
image showing notch position is misleading: I was trying to understand why my DDR2 doesn’t fit into DDR2 slot, so spent some time measuring notches :) Finally, it turned to be FB-DIMM. But still, isn’t it nice to put exact notch positions both in millimeters and pins into the article body text?
 * pin density is the same for DDR and DDR2 (92 pins, correct for DDR, incorrect for DDR2)
 * ruler has centimeter precision, which is not sufficient to distinguish notch positions
 * other possible notch positions not present (FB-DIMM in my case)

brankovic, 85.141.70.43 (talk) 08:34, 11 June 2010 (UTC)

High vs. Low Density
IMO there should be a clear discussion on how to differentiate between "high density" and "low density" memory configurations. There is so much confusion among laymen regarding this out there in the wild.

Further: Regardless of the current state, I very much like what seems like tireless attempts at clarity. As with software engineering, the EE crowd so often disagrees on specifics and how to express the specifics. Very tough battle. Please keep it up.68.163.243.35 (talk) 12:05, 2 November 2010 (UTC)

clarification of units in chart measuring memory speed
is it possible that the chart under the section 'specification standards/chips and modules' has the columns for MHz and MT/s reversed? ALL literature on the subject of memory that i have encountered, including all references to individual computers' specs in specific computers' documentation refer to 'speed' of installed memory in terms of MHz. never have i seen it referred to as MT/s. further, when noting specific memory modules, such as DDR2-533, DDR2-667, etc. the corresponding stats/documentation refer to the 'speed' that matches the designation, i.e. DDR2-667 has a speed of 667MHz, etc. according to the chart in the article, the MHz is half of each value of the MT/s. but again, that would not reconcile with all information regarding memory specs, anywhere else. is it possible the columns for I/O bus clock and data rate are reversed, in whole or in part?

if not, please explain how the information in the chart does not mesh with information on this issue found everywhere else. 72.92.237.181 (talk) 06:05, 1 June 2011 (UTC)
 * No, the stats are correct. Many dumb sites or sellers just inflate the MHz for marketing purposes (because DDR memory transfers two data pieces per clock signal they just double the physical clock speed). The MHz in this article refers to the actual physical clock speed, MT/s is what the others usually refer to as "MHz". --Denniss (talk) 12:08, 1 June 2011 (UTC)

k, i appreciate the clarification somewhat. tho to be honest (with acknowledgement and appreciation of your knowledge), it seems odd to call sites/vendors 'dumb' when including the speed stats since all, ALL, vendors, manufacturers, respected computer media, etc. refer to that particular stat as MHz. it cleared it up when u said that the MT/s is what you say others refer to as Mhz. that much was clear. still strikes me as odd since it seems a standard, not dumb, reference. i mean, it hardly seems reasonable to consider the engineers at kingston writing the white paper i read recently as dumb, since they used the MHz stat throughout. and the white paper wasn't designed for 'mass market consumption' if that were to be one (inappropriate) possible critique. that's just one example of many. i think it's simply a valid way to reference that stat. just sayin. also, it would make it easier to understand the topic since most (all) people seeking out this article, and others such as the DDR3 article, are using a common reference stat and would like to be able to relate it to the information that you provide, which, in present form, isn't possible without confusion. 72.92.237.181 (talk) 16:44, 1 June 2011 (UTC)


 * MHz sells, do you remember the Pentium 4 CPU? That's why I call sites "dumb" if they continue to use the Marketing-MHz instead of using facts. --Denniss (talk) 17:11, 1 June 2011 (UTC)

hmm, well, not sure about the pentium 4 reference, but probably shouldn't bother with that... anyway, i guess we're pretty much at an impasse as far as our divergent views on issues of absolute technical accuracy and industry standard terminology (notwithstanding whether or not one has an opinion about the validity of using certain reference terms, e.g. MHz and MT/s and theories about reasons why it is used). i sense an intransigence regarding the presentation of this info in the article (and maybe related articles), but it would certainly be reasonable and at the very least more thorough to include a notation with the chart stating that industry references to memory speed in MHz are directly comparable to the MT/s data in the chart. after all, people look to wikipedia and it's well informed authors to provide relevant information. as it stands, there's just confusion when trying to reconcile the specs that people have about their comps' memory with the chart; trying to figure out why the MHz number they have, along with its named description doesn't match what's presented in the article, without so much as a simple explanation. i mean, really, there's even the notation about rounding the descriptor -667 due to the "superstition about the number 666". (?!) that was important but not a footnote to make the chart actually relevant? 72.92.237.181 (talk) 05:17, 8 June 2011 (UTC) — Preceding unsigned comment added by 72.92.237.181 (talk) 04:09, 6 June 2011 (UTC)

Misconception about 667 MHz
There is a wide misconception about the origin of the 667 MHz denominator as coming from the 666-phobia. The facts are as follows:

In computing, a 333 MHz signal is actually being generated by dividing a 1000 MHz signal by 3. So the accurate frequency thereof will be 333.33333... The 666 MHz equivalent is obtained by multiplying the 333 MHz signal by 2, giving a signal that has accurately 666.6666... Mhz, which when rounded to an integer gives 667 MHz. That's where the 667 MHz comes from!

There's no place for superstitions (& superstitious) in computing! — Preceding unsigned comment added by Stefsz (talk • contribs) 07:44, 14 October 2011 (UTC)

Where does the 667 MHz come from if the bus clock is 333 MHz? 667 is the MT/s... — Preceding unsigned comment added by 94.63.82.69 (talk) 18:01, 7 May 2020 (UTC)

New/Different type of DDR2 RAM for Dell servers
Hi, I just came across some RAM modules that are different than normal DDR2 modules. The notch is slightly more to the right (4 pins/4 mm). It seems like this type of RAM are for Dell servers. I have searched the net a bit for information about this, but without luck. Anyone that knows about this - and that will update the article, since I think this is important information that should be included. /PatrikN (talk) 10:16, 16 November 2012 (UTC)
 * Do you have an image or a type/oder number for this module? --Denniss (talk) 11:23, 16 November 2012 (UTC)
 * Yes! Hynix 1GB 2Rx8 PC2-5300F-555-11. /PatrikN (talk) 13:54, 16 November 2012 (UTC)
 * Fully Buffered DIMM with DDR2-chips, not a standard DDR2 module. See image in article with explanation for different notch position. --Denniss (talk) 22:27, 16 November 2012 (UTC)
 * Thanks! That's it. Now, do you agree that this article should be updated with some info and a link to that page? You are welcome to do it:-) /PatrikN (talk) 22:35, 16 November 2012 (UTC)

QBM is not DDR2
So why does QBM redirect to DDR2? And then not even mention anywhere in the article what it is(an extension of DDR, again NOT DDR2, it was an alternative to DDR2(OCZ for example released some QBM RAM modules in 2002, a year before DDR2)). DW75 (talk) 19:59, 6 December 2013 (UTC)

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Capacity per module
Hello. I arrived at tis article searching for how much GB one DDR2 module can have; but it does not say.

The DDR3 SDRAM is pretty clear right at the introduction:
 * "The DDR3 standard permits DRAM chip capacities of up to 8 gibibits, and up to four ranks of 64 bits each for a total maximum of 16 GiB per DDR3 DIMM. Because of a hardware limitation not fixed until Ivy Bridge-E in 2013, most older Intel CPUs only support up to 4-gibibit chips for 8 GiB DIMMs (Intel's Core 2 DDR3 chipsets only support up to 2 gibibits). All AMD CPUs correctly support the full specification for 16 GiB DDR3 DIMMs."

But for DDR2, this information isn't presented at any point in the article. And that's a very relevant information.--MisterSanderson (talk) 21:26, 24 January 2019 (UTC)
 * AFAIR max size of standard modules is 4 GiB, Registered/Fully-Buffered modules may double this. --Denniss (talk) 10:49, 25 January 2019 (UTC)

Move discussion in progress
There is a move discussion in progress on Talk:Synchronous dynamic random-access memory which affects this page. Please participate on that page and not in this talk page section. Thank you. —RMCD bot 19:15, 14 February 2019 (UTC)