Talk:DDR5 SDRAM

Unnamed section
This should be notable since most desktop PC's use DDR[] SDRAM Plaasjapie (talk) 21:34, 6 August 2014 (UTC)

Reference 4, the Freescale Datasheet has nothing to do with DDR5 memory, it uses DDR1 - DDR7 as labels in the timing diagram for DDR parameters on a DDR2 timing diagram. Also the patent links in the references are broken. 134.134.139.76 (talk) 22:35, 29 October 2014 (UTC)

Contested deletion
The grounds for deletion, a previous deletion, is a discussion from over three years ago. While a stub, this article does not have the same defects as the previous version. It should be updated, but not deleted. --Dbsseven (talk) 16:49, 15 January 2018 (UTC)

Move discussion in progress
There is a move discussion in progress on Talk:Synchronous dynamic random-access memory which affects this page. Please participate on that page and not in this talk page section. Thank you. —RMCD bot 19:15, 14 February 2019 (UTC)

2019 estimate
WP:PRIMARY What we need here are significant high quality secondary references confirming this. — Preceding unsigned comment added by 122.57.60.68 (talk) 04:01, 13 August 2019 (UTC)
 * Tom's Hardware is not a primary source. Tom's Hardware says manufacturers told them late 2019, and that is what we will have in the article. —Locke Cole • t • c 15:20, 13 August 2019 (UTC)

DDR4 -> DDR5
"“There is a general expectation that most use-cases which currently use DDR4 will eventually migrate to DDR5.”"

Is that a necessary sentence?


 * A necessary part of an article about a product is saying how widespread the product in the article is or will be - there is an essential difference between a product which is unused, and a product which is used by everyone. Is it a product used by 7000 people or by 7000000000 people? Hence we obviously need that sentence, or something like it. Why do you imply we don't need it? Thue (talk) 09:45, 30 March 2020 (UTC)


 * Removed and should've never been added, see edit explanation 78.0.162.14 (talk) 23:26, 21 May 2024 (UTC)

Bandwidth?
The quoted bandwidth of "4.8 gigabits per second possible" is one-hundreth of the actual value, "51.2 GB/s per module", a few paragraphs down. — Preceding unsigned comment added by 203.121.197.180 (talk) 12:56, 21 October 2021 (UTC)

Voltage is wrong
""DDR5 DIMMs are supplied with bulk power at 12 V and management interface power at 3.3 V,[18][19]""

I am not an expert on DDR5 modules, but in my opinion the PMIC specifies 12 V for RDIMM and UDIMM, but not for consumer modules, where 5V was chosen. This is also reflected in the cited spec sheet: https://www.renesas.com/us/en/products/power-power-management/power-management-ics-pmic-and-pmus/p8911-pmic-client-ddr5-memory-modules, which specifies VIN_Bulk input supply range as 4.25 V to 5.5 V, i.e. 5V. Another reference backing this is: https://www.kingston.com/germany/en/memory/ddr5-overview (not eligible as a reference, because it's an advertising link). — Preceding unsigned comment added by Timo.Strunk (talk • contribs) 16:03, 7 December 2021 (UTC)


 * Agreed. That info is plain wrong, as the linked source actually explains. 2001:9E8:3871:3300:998F:CA6A:6065:3212 (talk) 19:41, 17 December 2022 (UTC)