Talk:IBM 7030 Stretch

ZZZZSTUV
In the section "Registers", address 10 $SB, there appears: "ZZZZSTUV". Can someone explain what those characters mean? John Vandenberg 05:39, 14 October 2006 (UTC)


 * This is how the bits of the register are identified in the IBM documentation.


 * S - Sign bit
 * T - Flag bit
 * U - Flag bit
 * V - Flag bit
 * Z - Zone bit


 * See: Reference Manual page 36. -- RTC (talk) 06:59, 30 January 2008 (UTC)

The fastest computer in the world from 1961 until 1964.
This claim is challenged by the three instances of the Ferranti Atlas in the UK. However, such claims need precise justification, so I've not altered the text, see -. Michaelwilson (talk) —Preceding undated comment added 14:30, 6 June 2009 (UTC).

Reference columns
I don't think having two columns of references helps. It does save two lines, but it breaks #1, 7, & 8. Bubba73 You talkin' to me? 01:35, 17 October 2014 (UTC)

Software list
I've added a tentative link to a COLASL article, but I won't be trying to write it immediately since to do so implies transcribing stuff from the LASL book with mathematical symbols and coloured text. If anybody feels up to it be my guest :-) MarkMLl (talk) 11:10, 30 October 2014 (UTC)

Some details
How many were built/used? Were there different configurations? Which devices were used for I/O and programming (card readers/punchers etc.) --Mopskatze (talk) 04:02, 9 May 2017 (UTC)


 * I recall the number being 13; various sources claim 9, and don't mention C-E-I-R, Inc, which I recall as having been one of the customers.


 * Like most computers, the configuration was whatever you ordered. Neither the memory size nor the peripheral devices were one size fits all. IBM offered card readers, card puinches, printers, magnetic tape drives, disk drives, etc., and you ordered as many of each model as you needed, and could always add more if necessary. Shmuel (Seymour J.) Metz Username:Chatul (talk) 01:11, 28 May 2020 (UTC)


 * I've found a reference to the order from CEIR; does anybody know whether it was cancelled or delivered? -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 16:46, 20 November 2023 (UTC)

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 * It sends you to a PDF, but neither Preview on Sierra nor the "2017 release" of Acrobat Reader DC on Sierra can read it - they both say it's damaged. I went to the IEEE site instead, even though it's a paywall. Guy Harris (talk) 06:33, 10 November 2017 (UTC)

7030 vs. Atlas
There is a question posted above about the 7030 vs. Atlas. Looking into this, the 7030 slightly, but did, best the Atlas. Atlas did an add in about 1.59 micros while Atlas was 1.38 to 1.5. So I think it is safe to say that the 7030 was the world's fastest through this period. That said, it seems Ferranti's main sales point for the Atlas was that it had much higher overall throughput than the 7030 due to its fantastic channel support (512 devices!) and multiprogramming OS that was able to keep the system busy (and ran 1000 programs a day on average). In overall workload terms, Atlas did outperform the 7030. So which was the most powerful, depending on your definition, is still open to argument. Ultimately while IBM considered the 7030 to be a failure (for a time anyway), Atlas was considered a huge success and sold several additional machines until CDC came along and rained on everyone's parade. Maury Markowitz (talk) 20:06, 16 December 2019 (UTC)


 * "Atlas did an add in about 1.59 micros while Atlas was 1.38 to 1.5. So I think it is safe to say that the 7030 was the world's fastest through this period."


 * Presumably the second "Atlas" in that quote should be "the 7030". Guy Harris (talk) 20:19, 16 December 2019 (UTC)
 * Indeed Maury Markowitz (talk) 21:34, 16 December 2019 (UTC)


 * Most likely the comparison should be other than just add time. As well as I know, the 7030 was used at LASL for bomb design calculations. For CPU bound problems, I/O speed is less important, and maybe also multitasking is less important. Gah4 (talk) 02:07, 17 December 2019 (UTC)
 * Feel free to peruse the references added to the Atlas article, which has all the metrics. Maury Markowitz (talk) 12:07, 17 December 2019 (UTC)


 * Any realistic comparison of performance must take into account the effects of memory size and overlap. As I understand it, the raw instruction time on Atlas was slightly faster but Stretch had better pipelining. Also, while the Atlas design allowed or a much larger memory size than stretch, the units actually shipped were smaller. Even the drums were tiny. Shmuel (Seymour J.) Metz Username:Chatul (talk) 01:06, 28 May 2020 (UTC)
 * As well as I remember without looking it up, the 7030 was considered a failure given its cost/performance. They had to sell them for about half the expected price. Gah4 (talk) 20:17, 12 September 2023 (UTC)
 * As well as I remember without looking it up, the 7030 was considered a failure given its cost/performance. They had to sell them for about half the expected price. Gah4 (talk) 20:17, 12 September 2023 (UTC)

Timeline: architecture or marketing niche
Should the terms predecessor and successor refer to architecture or to market niche? I would have expected them to refer to architecture, in which case Stretch had neither a predecessor nor a successor, but the article seems to be referring to market niche. Where is the best place to ask this question in a more general context? --Shmuel (Seymour J.) Metz Username:Chatul (talk) 17:09, 22 December 2021 (UTC)
 * I would suspect market niche, but maybe you can ask in WP:MOS. Gah4 (talk) 00:54, 14 September 2023 (UTC)
 * I would suspect market niche, but maybe you can ask in WP:MOS. Gah4 (talk) 00:54, 14 September 2023 (UTC)

Designer
Why is Amdahl listed as the sole designer of the Stretch? He quit IBM because his original design was not going to be followed by Dunwell. Shouldn't we be attributing the design, if not partly, to Werner Buccholz who actually saw the project to the end? Benforeva (talk) 03:45, 1 May 2023 (UTC)

Prefetch?
The article claims that Stretch pioneered prefetch, but links a redirect to Cache prefetching; Stretch did not have a cache. Stretch did, however, pipeline instruction fetches.

The article mentions System/360 Models 91, 95 and 195, and the IBM 3090 series, as having instruction pipelining, prefetch and decoding, and memory interleaving; seeming to imply a gap during which they were not used. However, the 360/85, 370/165, 370/168, 3032 and 3033 also had asynchronous I-units.

The article probably should mention that other vendors had memory interleaving in the 1960s, e.g., CDC. -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 08:59, 12 September 2023 (UTC)
 * The 360/91 is a favorite, or was for many years, in books on pipelined processors. The 7030 is rarely discussed. But okay, as well as I remember, the 360/91 can prefetch on three paths. That is, following two possible conditional branch paths. I suspect prefetch on a single path was not so rare by then. I don't know specifically for the 7030, though. I usually look at Blaauw and Brooks book for these questions. Gah4 (talk) 20:20, 12 September 2023 (UTC)
 * Prefetch input queue appears to be an article about instructio prefetching, but it may suffer a bit from x86ism; for example, is "prefetch input queue" used as a name for instruction prefetch queues in general, or is it what Intel called it on some x86 processors? Guy Harris (talk) 01:07, 13 September 2023 (UTC)
 * There is no right answer when trying to match up features from different processors. For x86, it is complicated by the need to put words or bytes together to make instructions. If there is a common CS name, independent of the proprietary name, we could use that. When I find my Blaauw and Brooks, I will see what they say about it. Gah4 (talk) 00:52, 14 September 2023 (UTC)
 * From IBM's Early Computers, page 452: The design of the CPU's instruction and lookahead units provided(sic) for a high degree of concurrency. Up to eleven successive instructions could(sic) be in the CPU registers at various stages of execution: undergoing address modification, awaiting operands from memory, waiting for or being processed by arithmetic units, or waiting for a result to be stored in memory. Since instructions could be waiting for or being processed while others are being fetched, it makes it complicated to define prefetch. In any case, I suspect much of that is new in the 7030. The 360/91 has the ability to fetch from store buffers, which is often important, and maybe the 7030 doesn't have. Gah4 (talk) 02:03, 14 September 2023 (UTC)
 * IMHO, the 7030 was the most successful failed product in History, and it left a deep impact on future IBM products. I certainly know of no previous computer with pipelining. In comparing the 7030 to newer machines, expect differences in nomenclature, e.g., buffer instead of look-ahead level. -- Shmuel (Seymour J.) Metz Username:Chatul (talk).
 * Yes, much of it went into the 360/91. "... multiprogramming, memory protection, generalized interrupt, memory interleaving, lookahead, eight-bit character, and a standard interface for I/O devices" are S/360 features that originated on Stretch.
 * From IBM's Early Computers, page 452: The design of the CPU's instruction and lookahead units provided(sic) for a high degree of concurrency. Up to eleven successive instructions could(sic) be in the CPU registers at various stages of execution: undergoing address modification, awaiting operands from memory, waiting for or being processed by arithmetic units, or waiting for a result to be stored in memory. Since instructions could be waiting for or being processed while others are being fetched, it makes it complicated to define prefetch. In any case, I suspect much of that is new in the 7030. The 360/91 has the ability to fetch from store buffers, which is often important, and maybe the 7030 doesn't have. Gah4 (talk) 02:03, 14 September 2023 (UTC)
 * IMHO, the 7030 was the most successful failed product in History, and it left a deep impact on future IBM products. I certainly know of no previous computer with pipelining. In comparing the 7030 to newer machines, expect differences in nomenclature, e.g., buffer instead of look-ahead level. -- Shmuel (Seymour J.) Metz Username:Chatul (talk).
 * Yes, much of it went into the 360/91. "... multiprogramming, memory protection, generalized interrupt, memory interleaving, lookahead, eight-bit character, and a standard interface for I/O devices" are S/360 features that originated on Stretch.
 * Yes, much of it went into the 360/91. "... multiprogramming, memory protection, generalized interrupt, memory interleaving, lookahead, eight-bit character, and a standard interface for I/O devices" are S/360 features that originated on Stretch.
 * Yes, much of it went into the 360/91. "... multiprogramming, memory protection, generalized interrupt, memory interleaving, lookahead, eight-bit character, and a standard interface for I/O devices" are S/360 features that originated on Stretch.

Instruction format?
I added a link to the description of instruction formats in the manual. Should the article also show the actual formats, not just the sizes? -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 18:35, 17 May 2024 (UTC)