Talk:Interrupt vector

IVT implementation on 8086/8088 processors
I have been reading a bit in my course book about computer hardware and found the following information (this is written in my own words, it's not copyrighted information):

8086/8088 processors have a 16 bit data bus and a 20 bit address bus, so two registers are needed to contain an address: a segment register and an offset register. The memory address can be obtained by bit-shifting the segment register by four bits to the left and performing a summation with the offset register. The memory a program used is seperated into segments. The segment containing the code is called the code segment, and it's segment register is named CS. It's offset register is named IP or instruction pointer.

An entry in an Interrupt Vector Table (IVT) of an 8086/8088 processor consists out of 4 bytes describing the address of the ISR: 2 bytes for the IP and 2 bytes for the CS.

This information (just the last sentence, the other information might already be on wikipedia in a page about the 8086/8088 processors memory management) could be added to the Interrupt Vector page, possibly along other methods of implementing an IVT.

--Bernard François 11:46, 6 March 2006 (UTC)


 * Well, your book is somewhat retarded. Two registers are needed on the 8086 because it only supports a segmentation addressing model. There needs to be a base address for the segment in one register (which in this case is extended within the processor to 20 bits), and there needs to be an index into that segment in another register. The width of the bus has almost nothing to do with it. The book is basically describing real mode on an x86 processors. An entry in the x86 vector table is basically a real mode memory pointer.


 * The x86's real mode (and protected mode) interrupt descriptor table is described in a number of x86 articles. If someone wanted to, they could merge in the information to the article specifically about the x86's interrupt descriptor table.


 * Lets also not forget the difference between theory and implementation. There are other processors in the world besides those based on the x86 architecture. I would like to see this article stay more on the theoretical side.


 * Jsmethers 18:05, 6 March 2006 (UTC)