Talk:Iron law of processor performance

Counter Factuals
This verges into CISC vs RISC territory, so I'm not sure if it should be included here. However, the are counter-argument to this law is that it's easier to convert CISC instructions to a RISC set internally and optimize for known CISC instructions instead of pattern matching via macro-op fusion, which is hotly debated. There is even debate as to whether x86 uops are really equivalent to a RISC ISA. It doesn't help that there are studies which fail to find a correlation between performance/power and ISA. The counter-counter argument is that manufacturing and compilers and other optimizations can make up for those deficiencies. And since the "iron law" is only about the impact of the ISA, I'm not sure if this is the right place to review those arguments. And as a humble nerd without any chip manufacturing industry experience ... I feel a little lost. ツ indolering (talk)