Talk:JFET

Spanish Version
There is a real mismatch with spanish version. There, you can read $$I_D = \frac{k}{2}V_{DS}(V_{GS} - V_p)$$ instead of $$I_D = (2a) \frac{W}{L} q N_d {{\mu}_n} \left[1 - \sqrt{\frac{V_{GS}}{V_P}}\right]V_{DS}$$ for the current in the linear region.

Does anybody know which is the correct expression?. —Preceding unsigned comment added by Aasdelat (talk • contribs) 15:19, 6 August 2008 (UTC)

German version
$$I_{DS} = I_{DSS}\left[1 + \frac{V_{GS}}{V_P}\right]^2 $$?????? Is this right??? in the german wikipedia you can read        $$I_{DS} = I_{DSS}\left[1 - \frac{V_{GS}}{V_P}\right]^2$$ minus in placace of plus  —Preceding unsigned comment added by 89.49.121.34 (talk) 11:06, 6 March 2008 (UTC)


 * It depends on the sign you consider for $$V_{GS}$$. For example: in a n-channel JFET, the gate is usually at a potential that is less than source's one. Source is connectet to ground, so its potential is zero, and $$V_{GS} < 0$$. So, if you retain the sign of $$V_{GS}$$, you use $$I_{DS} = I_{DSS}\left[1 + \frac{V_{GS}}{V_P}\right]^2$$. But if you don't want to manage the sign of $$V_{GS}$$, you use $$I_{DS} = I_{DSS}\left[1 - \frac{V_{GS}}{V_P}\right]^2$$.
 * Also, if JFET is p-channel, the gate potential must be bigger than Source's. So, $$V_{GS}>0$$ and you must use the formula with the plus sign. —Preceding unsigned comment added by 212.225.187.144 (talk) 09:28, 14 August 2008 (UTC)

Comparison with other transistors
This section should describe in concrete terms why a JFET would be used and not a MOSFET. We see some functional differences but not generalization. Give me funtions. ~ -- — Preceding unsigned comment added by 206.188.55.225 (talk • contribs) 5 apr 2008 23:55‎

Split
splitup of article Field effect transistor in progress, please see Talk:Field effect transistor Pjacobi 15:52, 19 Jul 2004 (UTC)
 * Done Pjacobi 21:28, 19 Jul 2004 (UTC)

Too technical
The language in this article is probably too technical for most Wikipedians. It needs a good copyedit. I've just linked everything I could; some technical terms are still unlinked. - dcljr 18:41, 16 Sep 2004 (UTC)
 * In particular, VP in the equations needs to be defined. 71.41.210.146 12:04, 30 October 2007 (UTC)

Merge - Uses of JFETs
It has been suggested that Uses of jfet be merged into this article or section.

User:Ywywyw (Contributions) did not say why they put it in a separate article.

User:Yume no Kishi proposed that it be merged into JFET

Support It should just be a heading. --RobBrisbane 11:01, 8 July 2007 (UTC)

merge it!!XU-engineer 18:25, 29 July 2007 (UTC)

I don't even think it's worth attempting to merge; it appears to have been created by cutting phrases from descriptions of specific circuits and pasting them together without context. Maybe it was even created by a bot? Delete. --Theodore Kloba 12:17, 20 October 2007 (UTC)


 * Not to mention that at least some of the material is subject to copyright issues. I've deleted the page and replaced it with a redirect instead. --Michael Snow 20:22, 9 November 2007 (UTC)

This is an example of an article that has been cut to pieces by the wiki police until it is valueless. Typically they are very arrogant young men who don't know much about the subject they are editing. What serious expert would contribute to wiki when their efforts are just going to be deleted by some oaf. Well the answer it turns out is none. Hence this pointlessness. — Preceding unsigned comment added by 113.190.186.64 (talk) 22:59, 18 July 2011 (UTC)

Error?
I have a textbook in front of me that says current in n-type JFETs flows from drain to source. —Preceding unsigned comment added by 199.106.52.17 (talk) 16:18, 30 October 2007 (UTC)


 * That's definitely true of power MOSFETs. In an N-channel current flows from drain to source (electrons flow from source to drain), In a P-channel current flows from source to drain (electrons flow from drain to source). The reason for this is relatively obvious if you consider that in both cases the source is connected to the bulk, yet they have the N and P doped silicon reversed. I don't see any reason why JFETs would be any different. I believe that signal MOSFETs inside ICs (and possibly some monolothic FETs, although I am not sure) do not have the source connect to the bulk, so current flow can be bidirectional. Therefore, it's a bit hard to generalise. But I think the fault in the article is that it is not very specific. The statement made is true, for one common type of JFET (P-channel), but not the other major type. N-channel is probably more common, in fact. Last time I bought JFETs I don't even remember the store offering P-channels. I would qualify the statement. —Preceding unsigned comment added by 220.233.81.49 (talk) 17:26, 4 January 2008 (UTC)

The response immediately above is almost hopelessly muddled. An n-channel device, whether JFET or MOSFET, indeed supports current flow from drain to source, in both triode and saturation regions of operation. It also supports current flow in the opposite direction, but in triode only — Preceding unsigned comment added by 2602:30A:2E8A:CBA0:A81D:8365:FC62:C90F (talk) 10:16, 11 May 2016 (UTC)

Disjointed style
The first paragraph of the "comparison with other transistors" is bizarrely structured. It says (paraphrased) "x is small. y is extremely small. x is much smaller than z".

Wouldn't it be clearer to say "JFET have much smaller gate currents than BJT, making higher input impedances possible. MOSFET have even smaller gate currents but JFETs have higher transconductance (explain why this is desirable)." —Preceding unsigned comment added by 213.41.173.68 (talk) 22:23, 17 November 2007 (UTC)

Well this is'nt completely true that in N channel the current flows from drain to source, it is only true in the junction of drain and source.... —Preceding unsigned comment added by 221.135.57.130 (talk) 04:16, 4 December 2009 (UTC)

Unclear
The article mentions negative VGS. While this may be perfectly clear to EE, it is not stated whether VAB means potential of A minus potential of B or the reverse.

People who are learning this stuff will benefit from an explanatory sentence like "i.e. the gate is at a lower/higher potential than the source". —Preceding unsigned comment added by 213.41.173.68 (talk) 22:30, 17 November 2007 (UTC)


 * The convention is A-B throughout electronics. Cannot really go explaining that on every electronics article.   Sp in ni  ng  Spark  19:42, 14 June 2008 (UTC)
 * Funny you should say that.
 * Considering how the graph for the jfet characteristics gets is wrong. (OTherwise I agree).
 * I've also learned that VGS means voltage from gate to source. But in that case, for an n-channel jfet, the transfer charact. graph axis should point to the right; or if points toward left, it should be either VSG or -VGS. Hoemaco (talk) 13:31, 11 January 2024 (UTC)

Mathematical model
On the 'Mathematical model' part it's not clear what Id, Ids and Idss are.--CaioMarcos (talk) 04:48, 14 July 2008 (UTC)

Function
Besides comparing the JFET with a garden hose this section explains nothing at all. I'm not into this myself currently, but explaining (physically) what happens when gate voltage changes would be the least imho. --87.185.10.163 (talk) 20:44, 13 December 2007 (UTC)


 * A picture of the junctions in different states would be nice? I also think a picture of just the physical layout of various types of FETs would be useful.  This information is typically available at simiconductor manufacturer's websites.


 * I guess I'll try to make some.

JWhiteheadcc (talk) 09:02, 2 April 2008 (UTC)

Translation into Chinese Wikipedia
The sections "Schematic symbols" and "Comparison with other transistors" of the 13:32, 13 January 2009 BorgQueen version of this article are translated in to Chinese Wikipedia--Wing (talk) 15:10, 6 February 2009 (UTC)

ads — Preceding unsigned comment added by 115.252.45.251 (talk) 04:51, 20 June 2011 (UTC)

Advertising
The phrase "for the Temic J201 device" seems overtly advert-like. Perhaps this could be changed to something a bit more generic? — Preceding unsigned comment added by 173.74.164.193 (talk) 03:55, 14 October 2011 (UTC)

Figure
I think there is an error in the figure. The right side x axis label says Vds. Shouldn't this be Vgs? blackcloak (talk) 22:31, 9 November 2011 (UTC)


 * Answering in hope others have the same idea (I know from exams I correct).
 * Nope. In that case you would have two graphs, with the same axes, but different graph, that's no possible.
 * But the left graph should say -VGS actually. Hoemaco (talk) 13:34, 11 January 2024 (UTC)

Let's expand the abbreviation in the title
I know that many people (especially technically apt) use only the term "JFET". But for the average Wikipedia reader the full name is more understandable. Abbreviated references to the article will then display the full name of the device (as a tool-tip and/or in the status-bar) when hovered, like here for example: FET

I believe spelling out the title would be closer to the Manual of Style and the  title format recommendations. These recommend only abbreviations like LASER (Light Amplification by Stimulated Emission of Radiation) to stay abbreviated even in the page title. After the move double redirects must be cleaned up, of course. But there are even some bots to do that job.

What do you think? Zeptomoon chat/chase 11:16, 14 October 2012 (UTC)


 * Well, In my experience, JFET is very similar to laser. When you study microelectronics, it's presented to you about once what the letters stand for and after that its not mentioned again. You just call it a JFET (or Laser). --71.38.170.27 (talk) 05:22, 14 November 2012 (UTC)

VGS definition
I'm a little confused by this type of wording and the variables:


 * "To switch off an n-channel device requires a negative gate-source voltage (VGS)."

I would think that the "gate-source voltage" would be the voltage from the source to the gate. But yet, the symbolic representation of a n-channel device shows an arrow pointing into the gate, which to me, implies the gate is higher voltage than the source, and that VGS would be positive. Do I just have the notation wrong? If VGS represented how many volts the source was higher than the gate this would make sense, but that would violate my intuition for what VGS should represent. Thanks. -Theanphibian (talk • contribs) 15:50, 19 December 2012 (UTC)


 * The arrow indicates the polarity of the P-N diode junction between the gate and channel, so it points in for an N-Channel device to indicate that if the gate voltage is more positive than the channel, current will flow into the gate. (And current will increase above the saturation current). --Theodore Kloba (talk) 15:50, 13 March 2015 (UTC)
 * When you say VGS it means G->S voltage, or if using potential differences: VGS=VG-VS.
 * As far as I know this kind of notation is universally accepted. Hoemaco (talk) 13:35, 11 January 2024 (UTC)

Mathematic model fracked
In this 2008 edit, the craziness started by relabeling the small-voltage IDS as IDSS, which later got called a saturation current, since that's what that wrong name would usually mean. The model is all wrong. If we had a source we could go back and look and fix it. Maybe someone with a source handy will try to make it right. Dicklyon (talk) 02:11, 9 February 2014 (UTC)

I have corrected, sourced, and explained parts of it. If anyone has good books handy, some checking and help would be useful. Dicklyon (talk) 09:31, 9 February 2014 (UTC)

Silicon Carbide JFETs
A section is needed for the relatively new SiC JFETs. Anybody? --Theodore Kloba (talk) 15:50, 13 March 2015 (UTC)

Comments on the article
1. Is the image on the top right showing the flow of conventional current or electron current? The text says that electric charge flows from source to drain so my understanding is that conventional current flows from drain to source. If that is the case, then the image shows the electron current. Please confirm since this is confusing.

2. "Officially, the style of the symbol should show the component inside a circle (representing the envelope of a discrete device)."

Since this is the case, then the symbols be replaced by equivalents with circles.

3. "In 1947, researchers John Bardeen, Walter Houser Brattain, and William Shockley failed in their repeated attempts to make a FET."

Is that a fair statement? The folks above invented the MOSFET!

4. Was the JFET invented before the MOSFET? If it was, the history should mention something about it.

5. It would be nice to add notes about how much of the market JFETs have in comparison to MOSFETs. I spoke to a university professor that told me JFETs are slowly being removed from university books. I get the feeling the JFETs will slowly disappear or they will take a very small piece of the market. I also see that the comment above mine talks about SiC JFETs. Is this a resurgence in the use of JFETs?

ICE77 (talk) 18:15, 24 July 2015 (UTC)


 * Let me answer some of these
 * 1. Since it shows a p-channel JFET, it is apparently showing electrons or other negative charge carriers entering the source.
 * 2. The text explains how the circle style has become historic, for all transistor types except where a can-style metal housing is used as a separately grounded Faraday cage/screen.
 * 3. In 1947 they failed to build a FET, but succeeded in inventing the BJT, which was the first usable transistor (but not a FET at all), they later went on to other victories, including in development of FETs. The sentence in the article is about how hard it was to turn the 1920s invention into a real device.
 * 4. YES, the JFET is the original (non-experimental) FET, all others are later improvements.
 * 5. Many lesser universities are deleting all sorts of fundamental knowledge from textbooks, making them unworthy of calling themselves universities (I have seen that in my own field too). JFETs are (besides being the original and simplest FET) useful for a number of analog circuits (the uses section of this article needs expansion) where switching MOSFETs (and especially the enhancement MOSFETs) tend to fail miserably due to parameters having the wrong sign or being orders of magnitude wrong for the task.  Now a different issue is that JFETs like many other semiconductors are increasingly made only as parts of larger microchips which makes them less available as discrete (standalone) components for device engineers and lab exercises, but this doesn't remove the need for electronics engineers to understand them conceptually when they appear as part of the (actual or equivalent) diagram explaining the function of a microchip.
 * Jbohmdk (talk) 01:38, 2 January 2016 (UTC)
 * 4. YES, the JFET is the original (non-experimental) FET, all others are later improvements.
 * 5. Many lesser universities are deleting all sorts of fundamental knowledge from textbooks, making them unworthy of calling themselves universities (I have seen that in my own field too). JFETs are (besides being the original and simplest FET) useful for a number of analog circuits (the uses section of this article needs expansion) where switching MOSFETs (and especially the enhancement MOSFETs) tend to fail miserably due to parameters having the wrong sign or being orders of magnitude wrong for the task.  Now a different issue is that JFETs like many other semiconductors are increasingly made only as parts of larger microchips which makes them less available as discrete (standalone) components for device engineers and lab exercises, but this doesn't remove the need for electronics engineers to understand them conceptually when they appear as part of the (actual or equivalent) diagram explaining the function of a microchip.
 * Jbohmdk (talk) 01:38, 2 January 2016 (UTC)
 * Jbohmdk (talk) 01:38, 2 January 2016 (UTC)

Meaning of higher voltage at the end of the introduction
Towards the end of the introduction part, its written that in a n channel jfet, the voltage applied at the gate is lower than that applied at the source, and vice-versa for p channel. Lower voltage applied implies lower potential right? (So that GS junction can be reverse biased). So could I change it to say that as that is more simpler to understand.. Mr.Mog (talk) 05:30, 2 March 2019 (UTC)
 * Yes, pretty much so. The lead image caption is also needing work; it says "Electric current from source to drain in a p-channel JFET is restricted when a voltage is applied to the gate."  But "when a voltage is applied" is meaningless.  Should say perhaps "when a voltage that reverse biases the gate junction is applied".  Also note that it's actually possible, though not typical, to have an "enhancement mode" JFET, which is "off" at zero bias and turns on with forward bias (up to about 0.5 V). Dicklyon (talk) 07:04, 2 March 2019 (UTC)

Pinch-off voltage
No wonder I've always been confused about this. I've found references that define the terms to mean completely different things:


 * Threshold voltage:
 * value of vGS .. for which the channel is completely depleted .. vGS=VGS(OFF).
 * the gate-source voltage at which drain current approaches zero
 * Cutoff voltage
 * the gate-source voltage at which drain current approaches zero .. VGS(OFF)
 * VGS (off). It is the gate-source voltage where the channel is completely cut off and the drain current becomes zero.
 * VGS(off) is the value of VGS at which the drain current is 0.
 * https://www.researchgate.net/profile/Daniel_Montes3/publication/303945767/figure/fig21/AS:743982732673026@1554390714177/MOSFET-Behavior-Showing-Drain-Current-vs-Vds-with-Various-Vgs-in-Ohmic-and-Saturation_Q640.jpg VGS(off) is horizontal line at bottom
 * Pinch-off voltage definition 1:
 * value of vGS .. for which the channel is completely depleted .. vGS=VGS(OFF)
 * At this value of vGS the channel is completely depleted .. denoted VP
 * the gate-source voltage at which drain current approaches zero .. VP
 * Pinch-off voltage definition 2:
 * (VP). It is the minimum drain-source voltage at which the drain current essentially becomes constant.
 * This is a vertical line on the IDS vs VDS graph.
 * https://nanopdf.com/download/8-chapter-7_pdf shows this vertical Vp line, but also labels another line as "pinch off" for another VGS
 * https://www.electronics-tutorials.ws/wp-content/uploads/2018/05/transistor-tran18.gif shows VP as a vertical line on VDS axis, but also shows "Pinch-off Region" at the bottom
 * http://elektroarsenal.net/img/720/image841_0.jpg VDS(sat) is a curved line, defined in relation to VP which is a vertical line.
 * https://www.researchgate.net/profile/Daniel_Montes3/publication/303945767/figure/fig21/AS:743982732673026@1554390714177/MOSFET-Behavior-Showing-Drain-Current-vs-Vds-with-Various-Vgs-in-Ohmic-and-Saturation_Q640.jpg Vertical line Vp
 * Pinch-off voltage definition 3:
 * VP is the value of the VDS at which the drain current reaches a constant value for a given value of VGS.
 * "for a given VGS" means it follows the curve (and is better known as VDS(sat)?)
 * https://www.tina.com/resources/home/field-effect-transistor-amplifiers-2/3-large-signal-equivalent-circuit/#attachment_1916 has "pinchoff voltages" along a curved line

We should not be using the term "pinch-off voltage", then, except for definition 2 (unless there's an unambiguous alternative for that). — Omegatron (talk) 02:45, 4 January 2021 (UTC)

Datasheet nonsenses... by default from most makers.
Things like published in the wiki "For example, VGS(off) for the Temic J202 device varies from −0.8 V to −4 V.", the parameters are NOT tested, this is just a very generic guidance and the numbers have been copied directly from the 1976 datasheet and have no relation to current production line. Honestly. In many cases they have been carried over or copied from the competition without a grain of critical thinking.

There is also other evidence of these nonsenses and explained in a siliconix book on JFET transistors, that ALL the JFET parameters depend on each other, and one CAN NOT vary independently of each other, like the datasheets suggest. When you change the V(GS(off)), the resistance and current changes accordingly, and NOT independently, as the many datasheets suggest. When you look at the characteristic and min/max curves and compare those with the stated gfs Min (mS), and IDSS Min (mA), vs the V(GS(off)), you will see that the range of possible parameters is much narrower than the wide number guesstimates in the datasheet.

The other error comes from Fairchild transistor manufacture and sorting technology. Say, Process 92 transistors. It says the V(GS(off)) is between -0.8V and -4V, but that is for the whole Process 92 offer, and not for that one specific product! The margin of error in the datasheet is stated as exceedingly large, but that is for both historical reasons, and the current company not knowing what they are making, anyway. You can e-mail them and they don't know. I did that. The datasheets have pictures copied from 1970's that have no relation to the product, even, it is a jungle.

If you want guaranteed parameters and sorting, do for SANYO, now part of ON. (Motorola, Fairchild, Sanyo, and many others, feel free to add). To add to that. Vishay/Siliconix has killed their JFET line, which were far superior. When you buy the slassics 2Nxxx or Jxxx from ON, you have NO CLUE what the JFET is based on, is it the Fairchild, Siliconix, Motorola, or some place in the Czech Republic. Sanyo are better specified and sorted.

Refer to "2-7 CHARACTERISTIC INTERRELATIONSHIPS" page 50, DESIGNING WITH FIELD-EFFECT TRANSISTORS, SILICONIX INC., Editor in Chief, Arthur D. Evans, McGRAW-HILL BOOK COMPANY, and more

Usage
Hi, Could someone add a “Usage” or “Applications” section that concisely summarizes JFETs’ most common industrial usage and/or the most common commercial applications wherefor JFETs are used? For example, were JFETs ever used for digital logic, or did solid-state digital logic jump directly from primarily using BJTs directly to primarily using MOSFETs as the implementation technology? ’preciate it  —Arrandale Westmere (talk) 03:34, 22 October 2023 (UTC)


 * It's funny I've never heard of JFETs being used for digital logic. But I googled, and sure enough found there is at least one application for JFET SiC digital logic cause it can operate at over 500 degrees Celsius with radiation, apparently (https://www.techbriefs.com/component/content/article/tb/pub/briefs/semiconductors-and-ics/3415). Em3rgent0rdr (talk) 03:50, 22 October 2023 (UTC)