Talk:LOADALL

Circuits
The article does not shed light on the reasons for the presence and "undocumented" status of the LOADAL in the first place. I believe it along with (still undocumented AFAIK)pins on the 80286 has to do with supporting Intel's "in circuit emulator". In the same vein is the "undcumented undocumented" instruction code 0F 04 (on 286) which in my wildest guess is some kind of RESTORALL... or return from in circuit debugging instruction; but when executed on a normal 80286, this blocks (not even an NMI gets out, only a processor RESET does) because, in my guess again, it must be waiting for a transaction on an alternate BUS (alternate pins) which of course is unimplemented on the platform and possibly also on the CPU if it is a regular 286.

Could someone who had access to in circuit emulators provide information ?

Ninho

0F 04 opcode problem
I am interested in 0F04 problem too. I've recently updated this list with information on the 0F04 opcode which I had retrieved from Sandpile.org. It says the 0F04 opcode should be a halting sequence - at least, it was emulated on some BIOS, doing OUT to diagnostic port followed by halt. But you may be right with your guess - hope this information will help. Too bad all these undocumented and still unexplored things fade away...

intelfx

77.41.56.81 (talk) 21:34, 27 December 2010 (UTC)

CPU halt
I can confirm that the 0F 04 opcode also halts the CPU on 386, at least Am386DX-40. I used DebugX, remapped the default INT06 handler to an INT3 breakpoint trap, but this instruction is never reached when 0F 04 is executed. It should be possible to revive some old sources on ftp.gwdg.de/pub/misc/x86.org/source and eventually try it with 0F 04 and see what happens ;)

DiederikH (talk) 17:26, 14 October 2012 (UTC)


 * Well 0F 04 is definitely not mapped to LOADALL or RESET according to my programming. First I wrote a normal LOADALL program, then I substituted 0F 05 for 0F 04. Again this resulted in a total hang of the system.
 * Some tests can be done to further determine what the opcode does:
 * see what happens with a NULL-IDT and appropriate RESET-handler. If the CPU resets correctly, then the IDT is somehow involved.
 * see what happens in protected mode, CPL0 with appropriate fault handlers of course.
 * see what happens at CPL3. If it hangs then the opcode is probably a bug. — Preceding unsigned comment added by DiederikH (talk • contribs) 16:36, 30 September 2012 (UTC)


 * See here for conclusions Talk:X86_instruction_listings

Processors
The article states "[..] the two LOADALL instructions [..] do not exist on later processors". Are there informations on which processors exactly they don't exist anymore, besides in the AMD64 ISA? M!ndbyte (talk) 07:10, 16 May 2019 (UTC)

instruction (opcode )
Could anyone please add information about related  instruction, already mentioned above by its opcode? 92.37.230.179 (talk) 14:50, 4 October 2023 (UTC)
 * https://rep-lodsb.mataroa.blog/blog/intel-286-secrets-ice-mode-and-f1-0f-04/
 * https://news.ycombinator.com/item?id=32443389
 * https://forum.vcfed.org/index.php?threads/i-found-the-saveall-opcode.71519/