Talk:PCI Express/Archive 2010

PCI-e comptability
Does anyone have any further information on mixing different standard PCI-e products, in particular wether using a PCI-e 1.0 card in conjunction with a PCI-e 2.0 card on a PCI-e 2.0 motherboard restricts the PCI-e 2.0 card to 1.0 speeds? [specifically, relating to gfx cards as this information is hard to find conclusively, and useful when considering mixed/multi-card setups.] please add said info after this section:

PCIe 2.0 motherboard slots are fully backward compatible with PCIe v1.x cards. PCIe 2.0 cards are also generally backward compatible with PCIe 1.x motherboards, using the available bandwidth of PCI Express 1.1. Overall, graphic cards or motherboards designed for v 2.0 will be able to work with the other being v 1.1 or v 1.0. —Preceding unsigned comment added by 188.221.200.61 (talk) 19:05, 29 January 2010 (UTC)

PCIe Single Root I/O Virtualization specification (SR-IOV)
Just read this article on Arstechnica, and had a look at PCI-E here and saw no mention of SR-IOV. It sounds worthy of inclusion, or at least the link could be added. What do you think? - see final 2 paragraphs of page 3. Is SR-IOV a PCI 2.0 or PCIe 3.0 feature? —Preceding unsigned comment added by 217.34.138.161 (talk) 15:55, 15 February 2010 (UTC)

Ambiguous Units
The term "MB/s" is ambiguous. It should be clarified "MBytes/sec" or "MBits/sec" —Preceding unsigned comment added by Rahvee (talk • contribs) 14:37, 9 March 2010 (UTC)

MB/s = Mega Bytes/sec, Mb/s = Mega bits/sec, thus there is no ambiguity !! —Preceding unsigned comment added by 171.69.152.99 (talk) 19:52, 19 March 2010 (UTC)

Dual simplex or Full Duplex
PCIe lanes are Dual simplex instead of Full duplex, as they do not share the ground. Ref: http://www.extremetech.com/article2/0,1697,1152236,00.asp —Preceding unsigned comment added by 171.69.152.99 (talk) 19:52, 19 March 2010 (UTC)

Lanes
Can someone expand this section ? what other types of devices could fit on x1 other than network cards ? Can a x4 device fit on x16 slot? , etc thanks!! --Jor70 (talk) 14:47, 13 June 2010 (UTC)

Some IO devices are on x1. RME Audio do a range of audio IO which (as best I can make out) are x1. http://www.rme-audio.de/en_products_hdspe_aio.php#6 Ante Jazz (talk) 16:04, 5 July 2010 (UTC)

Why is this article still tagged as "needs update" and "needs an expert?"
Those tags go back more than two years and more than one year respectively. The article has had dozens of revisions since then. What gives? —Preceding unsigned comment added by Rbethune (talk • contribs) 22:44, 23 June 2010 (UTC)
 * Good point; I have removed them as being worthless to current editors. 150.250.101.65 (talk) 22:49, 4 August 2010 (UTC)

Standard mini PCIe SSD
Can the editor or someone explain what the next sentece talks about?

"[...] there is a true 51mm Mini PCIe SSD with two stacked PCB layers, which allows for higher storage capacity. It preserves the PCIe interface, making it compatible with the standard mini PCIe slot [...]"

Thanks —Preceding unsigned comment added by DCrypt (talk • contribs) 21:13, 11 August 2010 (UTC)

Nonstandard PCIe form factor
Does anybody have more info about PCI express cards which have the same connector as a Mini PCI type III (124 pins, legacy 32 bit PCI used for laptop Wifi) but they contain a PCI express interface? I have a SAS adapter made for IBM servers which is such a nonstandard card (lookup 44X0411 in Google / Google images). We tried it in a PCI to MiniPCI adapter - it of course haven't worked (we did not know it is PCI express at that time). So we were lucky that there was no smoke - but the card mechanically fits, which is quite an issue! Thanks for any info, Daniel. 95.105.164.207 (talk) 14:55, 16 August 2010 (UTC)

Speed of electricity
Electrical signals travel at the speed of light for the current medium and wavelength. The "speed of electricity" term normally refers to the velocity of the actual charge carriers, e.g. electrons or ions, which travels many orders of magnitude slower than the electrical signal itself. The sentence in the "Serial bus" section should be reworked since as it is right now it is inaccurate and may be misleading to a reader without sufficient background in physics. —Preceding unsigned comment added by 91.66.18.56 (talk) 16:15, 6 November 2010 (UTC)

nVidia and PCIe
Why it is stated that nVidia supports PCIe v.2.0? None of nVidia chipsets fully support the standard (same for the graphics cards) - nVidia chipsets are somthing that Intel marks on its product PCIe v.2.0 (2.5GB/s) - might be a bit more. As to the graphics cards - they use "Graphics PCIe* - a propriatary and slower than v.1.1 version of PCIe —Preceding unsigned comment added by 78.36.39.135 (talk) 17:37, 11 September 2010 (UTC)

PS. Someone is persistently deletes any info about NVIDIA "Graphics PCIe" - seem to be NVIDIA-paid, as full info on non-standard NVIDIA PCIe interface (no parity and very slow, still in use up to Fermi processors) may be found in several Intel documents. Support of "Graphics PCIe" is specially noted in X48 and X58 chipsets docimentation. The problems with "Graphics PCIe" on PCIe v 1.0 slots - in several much ealier documents. The problems with standard PCIe 1.0 cards in ealier NVIDIA "PCIe" chipsets slots - in Areca, Adaptec, HighPoint documentation

Backward compatibility of 3.0
3.0 slots are not backward-compatible. This ought to be mentioned, perhaps with an explanation from whoever made the decision to break compatibility. 98.235.81.240 (talk) 20:59, 21 November 2010 (UTC)

Where did you get that from? 3.0 uses the same interconnection hardware as 2.0 - that was one of the main reasons to use 8Mb/s and not 10 Mb/s, as was planned ealier (10Mb/s will definetely need other pitch rate). —Preceding unsigned comment added by 78.36.39.135 (talk) 09:18, 5 December 2010 (UTC)