Talk:Single instruction, multiple threads

Does 'SIMT' Include Latency-Hiding?
Should we consider 'SIMT' to include the latency-hiding strategy used by its current-day implementations, whereby different warps can be switched between with zero overhead?

One could construct a SIMT architecture which did not have this scheduling strategy, after all (as, say, an extension to an ordinary CPU architecture), but this scheduling strategy is central to the way SIMT is used today.

For now, I've assumed it is to be included in 'SIMT', and have made this change accordingly: |17:09, 28 August 2014‎.

Wootery (talk) 17:16, 28 August 2014 (UTC)

Did NVidia Invent SIMT?
In their processor just before the ZMS-05, 3DLabs (now ZiiLabs) used SIMT, which (to me) is just SIMD with some paths disabled some of the time, and converting to a jump if they are all disabled. Who was first to use SIMT? — Preceding unsigned comment added by Nickpelling (talk • contribs) 10:21, 18 November 2018 (UTC)

Same as SPMD
I think this article should either be merged with SPMD, or it should be explained how the two are different. Here's a lecture by a senior computer architect saying that they are synonyms: youtube_com/watch?v=mgtlbEqn2dA&t=808 — Preceding unsigned comment added by 180.150.36.7 (talk) 03:47, 5 October 2019 (UTC)