Talk:X86/Archives/2011

Register Breakdown
My HTML-fu [and a general lack of time] are failing me but the register breakdown for the 8 additional registers is incomplete. You can access the R8-R15 as 64, 32, 16, and 8-bit words. You cannot access the high words like say "ah" (versus al). —Preceding unsigned comment added by 209.217.122.41 (talk) 16:56, 3 July 2009 (UTC)

What are you talking about? Of course you can access high byte registers, same with low registers. You can simply use an operand or address size override prefix if using the ModR/M specifier to access these registers. If you're just listing the extra Rx registers along with other bytes than you mind as well list RxL, RxW, RxD. It Should also be noted in this article that in 64-bit mode, this mode introduces the low byte versions of the registers SI, DI, SP, and BP. ChazZeromus (talk) 22:40, 13 August 2009 (UTC)

Navigation
Could there be a more obvious way to direct readers to X86 assembly language than the mention in the "See also" section? Maybe something in italics at the top a la disambiguation? —Preceding unsigned comment added by Johnruble (talk • contribs) 10:35, November 2, 2006

✅I added a " see also" tag .Bettering the Wiki (talk) 13:40, 21 August 2008 (UTC)

Another Point...
I'm not sure if this has been mentioned already but Intel has also developed and released 64-bit Xeon and Pentium 4 and Pentium D (Dual-Core) processors. The technology is known as EM64T (extended memory sixty-four technology).

While the following external links were removed as part of a responsible-looking edit, the IP editor made no comment to indicate they harmed the article.
 * , ,

--Jerzy(t) 16:04, 2004 Mar 14 (UTC)

Why are IA-32 and x86 separate articles? --Damian Yerrick 14:27, 2 Apr 2004 (UTC)


 * IA-32 is Intel's 32-bit instruction set, whereas x86 broadly refers to a range of Intel processors (and their instruction sets, some of which predate IA-32). The two terms do overlap to a degree, but they're not synonyms. A 80286 is an x86 processor that does not support IA-32.


 * Perhaps better phrased as "a range of Intel, AMD, and other processors (and their instruction sets...)". Guy Harris 00:00, 13 January 2006 (UTC)

Revamping X86 and IA-32 articles
I plan on making some major changes to the contents of both the X86 and the IA-32 articles, to eliminate most of the overlap between them. I plan to make X86 the general overview of the architecture, with shorter technical descriptions, and more historical descriptives. For technical info, I will let the X86 link to the IA-32 (and also other articles) for more details. I will make IA-32 the more technical-oriented article, at least for the 32-bit side of this architecture. I will also let the X86 make links to the AMD64 article for the 64-bit technical details of this architecture.

--ykhan 05:29, 2004 May 3 (UTC)

The descriptions would benefit by being consistently in present-tense except where events are referred to. Where obsolete programming models are described, the description should still be in the present tense, with the context set in the opening paragraph. It's more tiring to read with the inconsistent style of description. For example,

Intel 8086 and 8088 had 14 16-bit registers. Four of them (AX, BX, CX, DX) were general purpose (although each had also an additional purpose; for example only CX can be used as a counter with the loop instruction). Each could be accessed as two separate bytes (thus BX's high byte can be accessed as BH and low byte as BL).

becomes

Intel 8086 and 8088 have 14 16-bit registers. Four of them (AX, BX, CX, DX) are general purpose (although each has an additional purpose; for example only CX can be used as a counter with the loop instruction). Each can be accessed as two separate bytes (thus BX's high byte can be accessed as BH and low byte as BL).

-- Shay

Done the revamping for you. Overlapping info merged and removed. However I made IA-32 focus on the name and succeeding architectures, with x86 containing the descriptions whilst not being too detailed and technical. Da rulz07 (talk) 02:14, 5 December 2007 (UTC)

Title
{wrongtitle|title=x86}

Naming conventions (technical restrictions) says "A workaround for this issue is to insert a unicode word joiner at the start of the name. This can be done by entering &amp;#x2060; in the move page box." Does anyone want to try this? Rd232 18:05, 29 July 2005 (UTC)

80286 Real/Protected
The 80286 had a problem that once it was switched into Protected Mode, only a Reset could change it back to Real Mode. The IBM-AT architecture had some way where software could force a reset to flip it back (a reset is really just another interrupt), but it was time consuming. That's what OS-2 tried to do.

It really wasn't until the 80386 came out that it was possible to have an operating system that could have some "back-compatible" mode for older real-mode programs in a reasonable, efficient way.

Swirsky 06:40, 6 Jun 2005 (UTC)

Need to point out the data-bus is 16-bit, while the address bus is 20-bit.

Why remove FOLDOC ?
While i feel the burden of explaining should lie on Stan Shebs, I'll avoid conflict before reverting again and explain:

According to the history section of this article, the original FOLDOC statement was introduced by Uriyan 23:07, 4 Jul 2002, and stated: This article (or an earlier version of it) contains material from FOLDOC, used with permission.

It did not state what is currently the statement implied by : This article was originally based on material from the Free On-line Dictionary of Computing and is used with permission under the GFDL.

Nor could it, because the original version is not equal nor very close to the very short

http://web.archive.org/web/20020906172641/http://foldoc.doc.ic.ac.uk/foldoc/foldoc.cgi?x86

1999-2002 FOLDOC entry.

This article may very well have used some of the info found in the 17 words of the 1999-2002 version, or the 43 words found in the current version, but that does not merit a statement in the article space. Anyone curious about who has contributed to the article will find FOLDOC mentioned among all the other contributors in the article history (in the summaries) and now also here.

Even though this BBC article would inspire me to write an entry on Lord Bell, noting that he works for Mark Thatcher, I would not conclude the article with a statement like "This article has used information found in BBC news". Should you (Stan) still have the desire to revert my change, then please discuss it here first.--Dittaeva 16:24, 26 Aug 2004 (UTC)


 * You have to attribute the source even if you only copied three words; the license doesn't say "only attribute if you feel it's merited". Not only is it dishonest to remove attribution, but Wikipedia could be sanctioned for violating the license. Another bad thing is that by introducing a fuzzy "does not merit" argument, you open it up to other people to say for other articles, "well, we're only using one sentence", or "I copyedited, lots of words are different now". The only way the FOLDOC cite could legally go away is if you rewrote from scratch, leaving out FOLDOC's sentences. This is different from using a source for facts, because facts aren't copyrightable, although of course it's expected of you that you Cite sources anyway, and too few WP articles do that. Anyway, if you don't like my reasoning, try your argument out on the village pump; but be aware that there are some pretty hardnosed people when it comes to copyright, I'm laidback about it compared to them. Stan 17:20, 26 Aug 2004 (UTC)
 * But which "FOLDOC's sentences" or "three words" do you mean? Have you actually looked at the links I supplied? If you compare the first WP version and the FOLDOC version, not even two words are connected the same way in the two versions, and the only mutually used words are: "a", "Intel", "AMD" and "of". Does that really constitute "originally based on material from the Free On-line Dictionary of Computing"? I do not mind FOLDOC being referenced with a link (and a reference header), but the license does not require us to put in a line of its own in the article-space for every source or contributor to the article.--Dittaeva 22:52, 26 Aug 2004 (UTC)
 * OK, you're right; I had the impression that some of the wording had survived. It looks like former editor Uriyan added the notation in July 2002, perhaps because he cut-n-pasted the "80186, 80286, ..." list from the FOLDOC entry and was being scrupulous. But that bit has been altered completely, so there's no vestige of FOLDOC-ness left. On the plus side, article history shows I wasn't the only one to want the attribution back, so now we have this little discussion as a warning note for the future. :-) Sorry to suck up your time on this! Stan 23:34, 26 Aug 2004 (UTC)

x86 licensing?
Anyone have info on if the x86 architecture is patented, and has to (or used to be) licenced by Intel or something? Googling around for a minute didn't turn up anything good for me to add to the article, perhaps I'll dig into it some other time if no one has info right at the top of their brain :) --Fxer 17:54, July 12, 2005 (UTC)


 * According to Mike Myers 'Comp TIA A+ Certification Exam Guide, 6th edition', pg. 70 "chipmakers have a habit of exchanging technologies through cross-licensing agreements ... In 1976, AMD and Intel signed signed such an agreement, giving AMD the right to copy certain types of CPUs". The article goes on to explain how Intel regretted this decision by the early 80's, and after much legal squabbling the agreement was mutually absolved January 1995. Since, AMD and Intel chips are no longer interchangeable.


 * Take that for what its worth.


 * 199.80.154.46 18:16, 19 October 2007 (UTC)

AMD 'clones'
I think that the phrase 'clones' is used incorrectly, as over the past few years AMD has created many propriety extensions to x86, to the point where AMD no longer 'clone' the chips. Also Intels version of AMD's 64-bit extensions is EMT64.


 * I too think that the word 'clone' is wrong in most uses. AMD originally had a license to produce x86 CPUs from Intel.  This dated back to the days when no system manufacturer would consider designing in a chip that didn't have a "second source".  Intel reneged on the license, fought a long court battle, and settled, leaving AMD with a complicated set of rights, not including full rights to future Intel chip design.  So AMD x86 chips up to and including the 386 were essentially the same designs as Intel's (even so, I would not call them clones).  I don't remember what AMD had for the 486.  Everything else was an independent design to the defacto standard x86 architecture.


 * Harris Semiconductors also had licenses from Intel to produce 286 CPU chips (and maybe earlier x86 chips).


 * NEC V20 and V30 chips implemented the 8080 and 8186 architecture. I have no idea about the legal arrangements.


 * As far as I know, all other manufacturers' implementations of x86 architecture were independant designs. Again, I would not call them clones.


 * Note that IBM x86 chips were designed by Cyrix (and Cyrix chips were manufactured by IBM mostly) so those two are essentially the same.


 * The point of this is that the word 'clone' seems to reflect a POV.


 * DHR 22:43, 14 January 2007 (UTC)


 * This is not a POV issue, the word 'clone' was a widely-recognized term for these systems (even if it's relatively obsolete in today's industry), see the hacker Jargon File: "[obs] PC clone: a PC-BUS/ISA/EISA/PCI-compatible 80x86-based microcomputer (this use is sometimes spelled klone or PClone). These invariably have much more bang for the buck than the IBM archetypes they resemble. This term fell out of use in the 1990s; the class of machines it describes are now simply PCs or Intel machines." radimvice 23:59, 20 April 2007 (UTC)


 * In this context, "clone" is not referring to IBM-PC-compatible systems, it's referring to the chips produced by AMD, so it's not being used to refer to "these systems", as it's not referring to complete computer systems at all. As noted, the original AMD x86 chips were made under license, so I'm not sure "clone" is appropriate for those.  And, as noted, AMD have made their own instruction set and other feature additions (including 3DNow! and 64-bit support), and processors with those are arguably a bit more than just "clones". Guy Harris 00:13, 21 April 2007 (UTC)

80.100.243.19 (talk) 11:11, 8 January 2010 (UTC)
 * Guy Harris is right. The clone as referring to IBM-compatibles is totally irrelevant. Regarding other meaning, the jargon file suggests the name can be used for precise as well as shoddy copies, legal as well as illegal. This means that the term has no place in a technical document like the one here. 80.100.243.19 (talk) 11:11, 8 January 2010 (UTC)

real mode addressing 'modes'
I don't think it's accurate to refer to near and far as addressing 'modes'. They are not modes. In fact every memory access uses both a segment and offset. The only difference is that sometimes the segment is not explicitly specified.

The terms near and far are used to describe pointers in software. Do you store only the offset (near) or both segment and offset (far)? The distinction has nothing to do with the CPU addressing hardware.

--ScottJ 17:50, August 10, 2005 (UTC)

Prospects for the x86
Okay,

I’m getting really, really tired of you reverting stuff which I removed under, what I believe are valid arguments. If you do so, you should provide solid sustainable counter arguments. Unfortunately, you don’t even try to do that. Three examples:


 * Your C# addition to the continuations article: you add it back by arguing that I should quote the C# spec on saying that it’s not a continuation. This is complete non-sense: 99.99 percent of specs of programming languages don’t say what a certain construct is not. They don’t do this, as it bloats the spec and as implementers of the spec are not interested in what a certain construct doesn’t do.
 * Your Microsoft addition to the Itanium and x86 page: You add it back under the cover of saying that Microsoft is big player. But, as I already mentioned Microsoft isn’t a big player on the high-end server market, which is the market the IA-64 architecture is aimed at. Moreover, it can also be argued that Microsoft is doing a very clever thing: They’re targeting their version of Windows for high-end servers at some the core application areas. Hence, it might just be the case that they want to gain experience in these areas before they start supporting other applications on these high-end servers.
 * You added back the "Prospects for the x86" section to the x86 article, but up until now you haven't come up with any arguments on why this doesn't violate the wiki policy of not being a crystal ball. Moreover, you completely ignore any application areas for which the x86 architetcure is completely unsuitable (do I hear high-end server market?).

Anyway, I beg you to provide solid arguments before you add something back of which you might suspect that the person who removed it had very good reasons for doing so.

-- Koffieyahoo 07:55, 7 September 2005 (UTC)

I can appreciate your tiredness and frustration. The Wikipedia process is hard work!


 * The net result of the process in the article on continuation was that (as you suggested) the example of delegates in C# was removed.
 * Attempting to suppress information from the Wikipedia article Itanium based on Microsoft conspiracy theories is misguided.
 * Attempting to suppress analysis in the Wikipedia article x86 on the false charge that it is "crystal ball" is similarly misguided.

--Carl Hewitt 16:25, 7 September 2005 (UTC)

In What_Wikipedia_is_not, it states:


 * The above prohibitions are not intended to suppress discussion of current trends and tendencies and how they may affect future events. In particular the Wikipedia allows discussion about the arguments for and against whether developments and proposals will be successful provided that they are well grounded and sourced.

However the above statement is new and so it may be controversial.--Carl Hewitt 21:30, 9 September 2005 (UTC)

In Wikipedia talk:What Wikipedia is not the above statement has been amended to:


 * "It is appropriate to report discussion and arguments about the prospects for success of future proposals and projects or whether some development will occur, provided that discussion is properly referenced. It is not appropriate for an editor to insert their own opinions or analysis, because of Wikipedia's prohibition on original research."

--Carl Hewitt 03:44, 10 September 2005 (UTC)

In that case, please explain why your statements are not original research. That is, cite a relevant source (I don't believe one exists). -- Koffieyahoo 14:51, 12 September 2005 (UTC)


 * The article cites sources. Which statements do you think need sourcing?  Thanks.--Carl Hewitt 16:57, 12 September 2005 (UTC)

Okay, to name a few:


 * "The displaced architectures include Lisp machines, Japanese Fifth Generation, Reduced Instruction Set, and supercomputers processors."


 * PowerPCs and SPARCs have a RISC architecture, both are still sold on large quantities, this is even more justified by the Xbox 360


 * Supercomputers are rediculously expensive, so not many of them are sold, but they 'are' still sold.


 * Fith Generation computers were never sold in large quantities as far as I know, so I don't think you can claim that x86s replaced them. Please provide a source if you think I'm wrong.


 * "Strong competition between Intel and AMD, coupled with the continuous progress predicted by Moore's law suggests that innovations will continue at a steady pace."


 * Please provide a source that claims this, otherwise I must consider it original research


 * "Considering the enormous (and increasing) research and capital costs incurred in the development and production of a modern processor"


 * Please provide a source which shows such figures.


 * "the x86 architecture is likely to continue replacing specialized processors in a number of markets."


 * Given especially my remarks regarding other architectures I don't think this claim can be maintained. If you think it can be please provide sources. Moreover, what are specialized processors. I mean I don't see any x86 processors in phones, PDAs, etc.


 * Itanium paragraph


 * Except for the first sentence I think this belongs in one of the Itanium related articles, not here.

Koffieyahoo 12:43, 3 January 2006 (UTC)

Image
There is a request for an image here, is there a particular qualifier for this? Are we looking for a newer AMD K6-2 processor? An older 286? Or even older 8086? If we're just looking for any random processor, or a series of different ones, that can be easily arranged. Janizary 04:10, 2 March 2006 (UTC)

AMD64 vs. EM64T vs. x86-64 vs x64
I would like to say that to say that Intel and Microsoft refer to AMDs 64bit CPU's different would be false. The words are use interchangable on both the MS and Intel sites. Furthermore x64 is used over whelmingly by almost of all member of varius technical communities. Please do not destinguish who uses these words because it is extremly hard to proove. —This unsigned comment was added by 66.72.205.197 (talk • contribs) 13:56, 22 March 2006 (UTC).


 * Intel presumably refers to AMD's 64-bit CPUs as "Athlon 64", "Opteron", etc.. That's not what "x64" refers to, however; it refers to the instruction set architecture.  AMD calls that instruction set AMD64, Intel calls it EM64T, and Microsoft uses x64 in the names of its OSes for AMD64/EM64T.  I see no sign that "x64 is used over whelmingly by almost of all member of varius technical communities". Guy Harris 21:57, 22 March 2006 (UTC)

80186 cores and "extended mode"
I have read about an "extended mode" on 80186 cores being sold today, where the segments are expanded to handle 24-bit addressing by making segments 256 bytes in size instead of 16. Perhaps some research should be done on this new mode's specifics and the relevant information added to this page. I don't know enough about it to do so, however. Daivox 22:05 UTC 23-Mar-2006


 * See Talk:Intel_8086 for a (possibly incomplete) list of manufacturers. 85.23.32.64 (talk) 00:11, 15 August 2009 (UTC)

List of 80x86 generations

 * 8086, initial/first generation - first member is Intel 8086 (and derivates), later multiple clones appeared.
 * 80186, first generation update - first member is Intel 80186 (and derivates), later multiple clones appeared.
 * 80286, second generation - first member is Intel 80286, later multiple clones appeared.
 * 80386, third generation - first member is Intel 80386 (and derivates), later multiple clones appeared.
 * 80486, fourth generation - first member is Intel 80486 (and derivates), later multiple clones appeared
 * 80586, fifth generation - first member is Pentium (and derivates), later appeared Nx586, 5x86, 5k86, WinChip, mP6
 * 80686, sixth generation - first member is Pentium Pro (and derivates, incl. Pentium M and Core), later appeared 6x86, K6, C3, Crusoe
 * 80786, seventh generation - first member is Athlon (and derivates), later appeared Pentium 4 (and derivates), C7, Efficeon
 * 80886, eighth generation - first member is Opteron (and derivates, incl. Athlon 64), later appeared Core 2 (and derivates)

the 80..86 links are redirecting to the article of the first member of the generation in question. But maybe we should make some disambiguation-like "generation articles" (similar to the "Xth gen. competitors" section in current articles like Pentium, Pentium Pro, Athlon, Opteron) - this way we could list also 8086/186/286/286/386/486 clones there. Alinor 20:07, 10 September 2006 (UTC)


 * What exactly defines a "generation"?


 * Are we talking generations of the instruction set architecture (which is what this page is about), in which case there are both obvious major updates (80286, adding a full-blown MMU; 80386, adding the 32-bit architecture; AMD64, adding the 64-bit processor), major add-ons (MMX, 3DNow!, SSE, SSE2, etc.), and minor updates (80186?, Pentium, P6, probably others along the way)? If so, then the "Design" section of this page already covers that.


 * Or are we talking about processor design updates, in which case there are sometimes instruction set updates associated with them and sometimes not, so it's not clear it belongs on this page, and it's not clear that AMD and Intel generations are obviously coupled, so perhaps there should be separate generation lists?


 * Given that the 80186 was a different physical architecture (with microcoded intructions replaced by silicon), had a different package, extra instructions, and ran (at least) two times faster at the same clock speed than it's predecessor, it qualifies as a seperate generation if pentium/pentium pro qualifies. (And you can see from the name that Intel thought it was a seperate generation).


 * Unless you are using the fact that IBM only ever made an 8088 generation PC and an 80286 Generation PC to define generations.


 * On the other hand, if the only difference is processor mode (Real Mode, Protected Mode, and Virtual mode), then there has only ever been three generations: 8086, 80286, 80386.


 * You forgot Poland^Wx86-64. :-)


 * Architecturally, yes, there are four generations of instruction set architecture, as indicated (at least if you ignore minor updates and the MMX/3DNow!/SSE updates), and multiple generations of processor design updates, which would include the 186 as a separate generation. Guy Harris 08:06, 1 November 2006 (UTC)


 * We should certainly separate instruction sets from particular implementations, it could probably make sense to define processor "generations" for instruction sets (like compilers do). However, it becomes rather silly, trying to do the same thing with implementations (unless employing a strictly chronological approach). Problems arises not only with Intel Core or Centaurs WinChip, which couldn't be put into any generation without severe logical contradictions, but with many other designs as well.


 * The only fair thing to do is to discuss (and/or classify) the individual physical processors real technical aspects and properties, such as, whether or not they have address-calculation in hardware (80186,..), protected mode (80286,..), 32-bit registers (80386,..), are tighly pipelined (i486,WinChip), superscalar (Pentium,..), speculative with register renaming (6x86,..), micro-op translation (K5,Nx586,PPro,..), very deep pipeline (P4), etc etc. Of course, whether this article is the right spot for such technical elaborations is another question. /HenkeB 17:03, 23 March 2007 (UTC)

...much criticized stopgap concept of segment registers...
Segment Registers were, and are, an architecture for separating out the code and the data. See Data Execution Prevention for the current implementation. Using a segmented architecture prevents buffer overrun exploits. (Actually, in the context of the times, buffer overrun system crashes were an equal problem). Segment Registers were later criticized by one particular important sub-group (unix/c programmers) but you can't call them a 'stopgap concept' - that's just wrong. 218.214.148.10 08:24, 1 November 2006 (UTC)


 * Segmented architecture is, in general, what you describe, and in fact the x86 protected-mode segmented architecture can achieve separation and protection. However, the 20-bit real-mode x86 implementation (which is what the article is calling "much criticized stopgap") was not designed for such a thing.  Not only is there no provision to mark certain segments as read-only or no-execute, but two different combinations of segment:offset addressing could point at the same byte in memory, subverting any attempt at separation and protection.  The 20-bit segmentation was almost certainly introduced to increase the addressable memory, and not for any sort of protection. AcidPenguin9873 21:45, 1 November 2006 (UTC)
 * That is a common point of view, but one not supported by by my experience at the time, nor by the literature that I have retained. This from an Intel programmers reference: "Generally, the most powerful microprocessors are the ones with the widest variety of addressing modes available" ... "The memory segmentation scheme is optimised for the reference needs of computer programs, and is separate from the operand addressing structure. | The structure for addressing operands whithin segments directly supports the various data types found in high level programming languages." ... "The iAPX microporcessor family with its memory segmentation scheme is designed for modular programs."
 * As you can see, the ability to use 20 bit addresses is not what Intel was proud of, nor was it what they thought users were looking for. In fact, their user community was happy with 16 bit addressing for some years after the 8086 was introduced: their next generation chip, the 80186, did not make any signifigant changes to addressing.
 * What I do remember from the time is that the problems of stack, program, and data co-location were well known, and the mini-computer operating systems which did not use a segmented memory architecture were widely regarded as toys. In this context, the Intel claims make sense: they designed a memory architecture that supported segmentation, just like on a real computer. 218.214.18.240 04:56, 8 July 2007 (UTC)

NPOV edits by 80.92.248.145
It seems to me the edits by 80.92.248.145 on the 17th of december are more than a little laden with negative value (see diff). Please advise. —The preceding unsigned comment was added by 193.50.44.5 (talk • contribs) 13:00, January 10, 2007 (UTC)
 * I would agree that those changes present a strong POV, and I can't see that they add anything much to the article. —  Aluvus  t/ c  18:50, 10 January 2007 (UTC)

SI vs Binary??
I think that there should be more consistency in the use of SI or Binary prefix notation, one or the other should be used. I think that when they are both it causes confusion eg does that 64KB mean 64*2^10 or 64*10^3? I feel that if (K|M|G|...)B is used exclusively, it will likely be assumed that powers of 2 are being used, when both are used some confusion will occur about values in the "SI" format. Busfault 02:40, 4 February 2007 (UTC)

Real mode 4 bit shift?
'''In real mode, memory access is segmented. This is done by shifting the segment address left by 4 bits and adding an offset in order to receive a final 20-bit address. [...] In this scheme, two different segment/offset pairs can point at a single absolute location.''' Why did the designers decide to use this rather complicated approach of generating absolute addresses? I guess it can cause problems when accidentally accessing / writing to addresses that are already used by something else. --Abdull 09:45, 11 March 2007 (UTC)
 * Yes it might seem odd, but basically it simplifies software development. Imagine a segment as a window onto a painting. Having overlapping "segments" means you can place the window anywhere you please on the picture, whereas with non-overlapping segments no two "windows" can show the same parts of the larger painting. In other words, Intel's method give developers more freedom when working with memory, at the cost that two segments can overlap.--Anss123 18:37, 21 April 2007 (UTC)


 * Could you give a more concrete example where such a thing might actually be useful?
 * In my experience, programmers vastly prefer "flat" addresses, saying it simplifies software development and gives them more freedom, over x86-style "shift segment address left 4 bits and add an offset" "segmented" addresses. (Although they may admit that x86 "segments" are not quite as bad as bank switching). --68.0.124.33 (talk) 03:54, 3 March 2008 (UTC)
 * Well, it's better than bank switching for sure and as long as you do not need more than 64KB of continuous memory it's not worse than a flat address space either. OS researchers like segmented architectures for their flexibility. For applications you can use them to bounds check a memory area, which is usefull for preventing illigal pointers and buffer overflows.


 * The parent question wondered why Intel’s segmentation scheme allowed overlapping addresses. That’s what I was referring too with it makes software development easier, if you compare with a flat address space segments still have merit - assuming your application lends itself to be segmented up, but few will choose Intel’s 20-bit segmentation scheme over a flat 32-bit one regardless.
 * --Anss123 (talk) 12:07, 3 March 2008 (UTC)

Barbarism
I have re-added in the reference to the word 'Pentium' being a barbarism, and added a reference to a discussion on the subject. It was evidently removed by a techie who does not appreciate that the naming of processors, and the origins of those names, is extremely important to people involved in sales and marketing (not to mention those involved in language research, but I'm not one of those).

If anyone still has a problem with this reference, please discuss it here rather than unilaterally deciding that it is not appropriate content for this article.DanMatthewsUK 13:30, 2 May 2007 (UTC)
 * Fair enough, but new discussion should go at the bottom.--Anss123 14:57, 2 May 2007 (UTC)

oops :)DanMatthewsUK 13:27, 3 May 2007 (UTC)

I removed it. The reason is that this factoid belongs in Pentium, not here. Ham Pastrami 21:06, 11 July 2007 (UTC)

Merge proposal with x86 assembly language
I know this is likely to be somewhat controversial, but it is my sincere opinion that "architecture" and "assembly language" are really quite inseparable in the context of an encyclopedic article. The only real difference IMO is between the hardware and software representation of the same concepts. Full instruction set references, either in the form of hardware or assembly language, are not encyclopedic content, it is a technical manual that is better left to external sources or Wikibooks. Currently the content of these two articles are almost entirely overlapping. Ham Pastrami 13:21, 14 July 2007 (UTC)


 * "I believe, however, that x86 architecture and x86 assembly are legitimately different to under alternate headings. Indeed, they both relate to each other in the fact that they are x86, but the assembly language for the x86 architecture can be classified separately in that it is an represents so much more information regarding an assembly language of x86 architecture type. Simply, the assembly language is applied according to the architecture and it :is related more than it is a part-of. It would also be useful not to bulk together related items but have more modular pages with links to related fields." - Ross R. Australia.


 * I to agree that this should not be merged, as one is a concept of hardware design, and the other is a concept of theory application. The concept of hardware registers is different than the concept of chipset connections.  It's almost a matter of letting the "editors" decide, however in Wikipedia WE are the editors, so it is my vote that we not merge the sections -- Cole Brand email to for further questions zib.nalot ta eloc 129.7.110.55 22:41, 28 August 2007 (UTC)


 * Whilst I appreciate where you are coming from in the idea for the merge, merging both articles would make the resulting article extremely long and cluttered. Perhaps just keep it like it is but add a very brief summary section in the architecture article with one of those links to main article. Therefore, my vote is not to merge. Changed my mind. After reading some of the other articles in detail, there is lots of duplicated content. Already started merging info. Da rulz07 07:28, 17 October 2007 (UTC)


 * I think what can be taken from the suggestion is that the articles should be condensed to have less overlapping information and that each section should focus more directly on what they should be, respectively. I'll agree is is a little odd and difficult to differentiate between the history of a language (encyclopedia worthy) and the language itself (an external reference manual). Also notable, the current Wikibook on the subject is quite poorly written for practical use and really needs an expert as suggested, but I added an external link to an EXCELLENT guide, despite being a bit old, for the early x86 processors. 199.80.154.46 18:25, 19 October 2007 (UTC)

Address spaces...
In the table it lists CPU addressing. I'm afraid that this is quite inaccurate, what that is actually listing is the register size. Addressing is quiet different. The 8088/86 is actually 20bit addressing. (which gets you up to 1MB of memory instead of just 64KB! quite useful to have an address space larger than your registers but needs segments...) The 286 is 24bit addressing. 32bit for the 386, 486 and pentium. 36bit for the pentium pro, pentium ii and pentium iii and pentium 4 48 bit addressing for the Athlon 64. —Preceding unsigned comment added by Mornnb (talk • contribs) 13:12, 20 November 2007 (UTC)


 * True of the physical address space. Not true of the logical/virtual address space.  For a lot of programming, the logical/virtual address space matters more than the physical address space.  It should perhaps give both the "flat" and segmented address sizes, rather than just the flat address sizes, but, other than that, the sizes are correct. Guy Harris (talk) 19:16, 20 November 2007 (UTC)

inconsistent disambiguation
The inconsistent manner with which binary prefixes were disambiguated was not good for this article. I've fixed it. Thunderbird2 (talk) 08:24, 11 May 2008 (UTC)


 * I disagree, it is not inconsistent and the current way uses WP:MOSNUM approved ways of using familiar prefixes. So I've fixed your edits. Fnagaton 08:49, 11 May 2008 (UTC)
 * There is no consensus for the current wording at MOSNUM. Please do not add inconsistency to the article. Thunderbird2 (talk) 08:59, 11 May 2008 (UTC)
 * There is consensus please read WP:MOSNUM and WT:MOSNUM where it is clear there is consensus. Fnagaton 09:01, 11 May 2008 (UTC)
 * No consensus there. I see only disagreement. Thunderbird2 (talk) 09:08, 11 May 2008 (UTC)
 * I'm afraid you might disagree but there is wider consensus. Please see the comments by an uninvolved editor like Francis Schonken's edits where he wrote "I agree with the current version of the proposed guideline addition. ... I see no problem to make this part of the guideline now". Fnagaton 09:12, 11 May 2008 (UTC)


 * I am trying to improve this page by removing a long-standing and well documented inconsistency. You are reverting my changes without any attempt at explanation except by reference to a disputed styleguide. I have no intention of engaging in a sterile edit war with you.  If you want to achieve consensus, try engaging in constructive debate. Thunderbird2 (talk) 09:49, 11 May 2008 (UTC)


 * I've already said it is not inconsistent (at my last edit). You've not shown exactly why it is inconsistent and since all of the use in this article is with powers of two it is not inconsistent to use the terms found in reliable sources, so don't try to accuse me of not providng reasons since you have not done so in the first place. Also the terms are disambiguated with the edits you made earlier in the edit history and are more familiar to the reader than using IEC prefixes. My goal is to improve the article by using prefixes that are more familiar to the readers and to disambiguate without pushing any point of view about what system to use, basically by disambiguating with the number of bytes instead of relying on virtually unused prefixes. Fnagaton 10:29, 11 May 2008 (UTC)

(ec) My recollection was that you had participated in the discussion concerning the inconsistency, and my attempts at that time at tidying up the article, so I did not consider it necessary to repeat the arguments. Thunderbird2 (talk) 10:35, 11 May 2008 (UTC)


 * Yes I remember and in response you made these edits which do not use IEC and I am fine with that. Nowhere in the discussion you just linked was it agreed that IEC should be used, unless of course you can supply the diff from that linked discussion that agrees your use of IEC? As Greg said above "The advantage of this wording [using GB etc], of course, is it is all the more accessible to a less knowledgeable readership.". Being accessible to less knowledgeable readership is an important aim of writing articles. Therefore use of familiar terms rather than the unfamiliar IEC prefixes is advantageous. Fnagaton 10:41, 11 May 2008 (UTC)


 * If you read the edit history and discussion you will see that the edits to which you refer are the ones that created the inconsistency in disambiguation that I now seek to correct. Thunderbird2 (talk) 13:57, 11 May 2008 (UTC)


 * I don't see any inconsistency if Fnagaton's edits are applied throughout. Resuna (talk) 00:33, 17 June 2008 (UTC)

Is this spell error?
In the first paragraph, "derived from the model numbers of the first few generations of processors". model "number"? Would that could be "member"?Callmejosh (talk) 06:36, 25 August 2008 (UTC)
 * The sentence is clumsy for other reasons, but "model number" is correct and "model member" would be incorrect. Model numbers (such as 8086, 286, and 386) are the identifiers for specific products. — Aluvus  t/c 00:05, 26 August 2008 (UTC)
 * Thanks. I see the reason for your explanationCallmejosh (talk) 08:05, 26 August 2008 (UTC)

Xbox
The article uses the original Xbox as an example of an x86 based system with "different hardware from the PC" This isn't very true. The Xbox used a video card very similar to nVidia's commercial PC designs, IDE for storage subsystems, and USB and Ethernet as connection systems. Furthermore, with a BIOS hack the Xbox can boot an otherwise standard Linux kernel. —Preceding unsigned comment added by 128.211.227.55 (talk) 19:34, 9 September 2008 (UTC)

MSR Register
Hi,

It could also be interesting to describe the msr register. Since I don't really know about it I can't help.

Thanks —Preceding unsigned comment added by 82.236.49.183 (talk) 21:45, 17 November 2008 (UTC)

Core i7 low power consumption?
The Intel Core i7 is described in this article as "In-order but highly pipelined, very-low-power, native memory controller, on-die L3 cache." i7 takes 130 watts of power, even more than the 3.8 GHz Prescott, how the hell can it be "very-low-power?"--Spectatorbot13 (talk) 06:47, 17 May 2009 (UTC)


 * I agree. It looks like someone's trying to shoehorn the Atom and the i7 into the same category because they share some design features.  Do you know more about the details?  Could you revise the description of what distinguishes them? Moxfyre (ǝɹʎℲxoɯ | contrib) 20:50, 18 May 2009 (UTC)
 * Not really, but the Intel Atom is only used for mobile devices, and yes they are fast and have extremely low power consumption (maybe 5 watts.) I don't know how, if they are related to the i7 because they are two different types of CPU. I'd fix it but I don't know details. An expert on the subject would be useful right now.--Spectatorbot13 (talk) 10:40, 19 May 2009 (UTC)

Rating
This article has been immensely helpful and deserves high ratings. --d-axel (talk) 09:44, 27 May 2009 (UTC)

Maximum length of instruction
The infobox at the top of the article shows the instruction encoding as "Variable (1 to 16 bytes)". Is there some reference for this? IIRC, earlier X86 processors allowed very long instructions to be constructed with redundant prefixes, but the 80386 raises an exception if the instruction exceeds 15 bytes. That number is needed for e.g. lock xor dword [es:eax+eax+0x12345678], 0x87654321 if the default address and operand sizes are 16-bit. So, has the limit been raised to 16 bytes, and when did that happen? 85.23.32.64 (talk) 00:53, 15 August 2009 (UTC)

Why are changes being reverted in the infobox?
I want to know why recent changes are being reverted in the infobox.


 * Perhaps, you should read the corresponding edit-summaries then? 83.255.40.21 (talk) 11:09, 23 February 2010 (UTC)

First, protected mode either is a 16-bit mode on the 80286, or a hybrid 16-bit/32-bit mode on later processors, so paging can occur in 16-bit code that is written to target 16-bit protected mode and not real mode.


 * Yes, paging may occur when a modern CPU executes old 8088 or 286 code, but does that mean the 8088 and 286 implemented paging...? Furthermore, protected mode does not imply paging... 83.255.40.21 (talk) 11:09, 23 February 2010 (UTC)

Second, I am trying to mention the registers in the fpr field in the infobox are eight 80-bit registers that must be accessed indirectly through a stack because the fpr field is for describing the FPRs. For example, there are no instructions that reference the physical FPRs when writing assembly code. Instead, you can only use aliases that reference the registers indirectly through a stack, like ST(3) to find the register that is three locations below ST(0), the top of the stack, in the stack. Who knows or cares about what physical register is being used? Nobody except chip debuggers can care about this. The architecure guarantees that you cannot know what is in FPR0, FPR1, and so on unless you do something to push the registers onto the main memory stack like in a function call or a task switch. Therefore, access is indirect to x87 registers. However, the XMM registers used in SSE2 are directly addressible without any aliasing. I was trying to capture all of the relevant details including the fact that x87 registers are never directly accessed. This fact is why x87 was so slow that its competitors like Power Macintoshes could truthfully boast that their floating point performance was twice as fast as an Intel-based PC's floating point performance, and why AMD decided to make SSE2 mandatory when it defined x86-64 to guarantee respectable floating point performance.

I am trying to capture all of this information into the infobox, and that it is frustrating that someone is reversing them. Jesse Viviano (talk) 07:39, 22 February 2010 (UTC)


 * That the x87-registers are addressed using a 3-bit offset relative ST0 within the instruction encoding is no more "indirect" than the corresponding x86 scheme with 3-bit register addresses addressing the GPR bank. You may compare it to the difference between add eax,[ebx] and add eax,[ebx+offset], for instance, both versions are equally indirect, although the last one is also relative. The real limitation in the compact x87 encoding is that one of the two operands always has to be ST0, the source or the destination, although the other operand may be either STx or a normal x86 memory-operand.


 * Modern x87 is indeed very fast, "despite" the stack. The main reason SIMD schemes like SSE2 and Altivec can be even faster is that they inherently support explicitly parallel processing; the fact that both operands are allowed random access to the register bank is quite insignificant in comparison. The SSE/Altivec instructions themselves does not execute any faster than x87 instructions, in fact, Intel's early SSE implementations were in many situations slower than the superscalar x87-unit in the semi-contemporary AMD K7, which is the main reason Altivec was faster for a while. 83.255.40.21 (talk) 11:09, 23 February 2010 (UTC)


 * I don't know who is undoing your changes, but I do think that the infobox is not the right place for lengthy descriptions. Perhaps you could consider using the main body of the article to describe the details you mention above. HumphreyW (talk) 07:45, 22 February 2010 (UTC)

One thing I forgot in my last post is that the documentation for Template:Infobox CPU architecture requires that the gpr and the fpr fields describe the registers. That is the main reason I am trying to describe the registers. Jesse Viviano (talk) 08:05, 23 February 2010 (UTC)

Datapoint 2200 heritage
The 8008 was based on the Datapoint 2200, so the entire x86 architecture owes its existance ultimately to that machine and the Intel 4004 (Intel's first CPU). The article on Datapoint 2200 mentions that "Equally significant is the fact that the terminal's multi-chip CPU (processor) was the embryo of the x86 microprocessor instruction set architecture, which powered the original IBM PC and has powered all of its descendants since." This is hugely important since it shows that the origins of x86 dates back further than the PC era and even the 8008. But this article does not even give the 2200 a passing mention. 130.101.140.102 (talk) 00:28, 30 September 2010 (UTC)
 * Let's put it this way: There are two individuals who have given ground to the very existence of the owners and inventors of both 2200 and x86: Mr. Adam and his wife Eve! Should we mention Adam and Eve in this article too? I don't think so. Fleet Command (talk) 07:45, 30 September 2010 (UTC)
 * Well, no, FleetCommand, you are making a nonsensical comparison. I agree with user:130.101.140.102 I own a Datapoint 2200, and manuals, and have spotted the close relationship between the organization of the instruction set before. Its clearly no coincidence, they are clearly related. Its very clear that the instruction set of the Intel 8008 owns heritage to the Datapoint 2200, and that is very relevant! Do not try to downplay the fact. Mahjongg (talk) 17:54, 20 October 2010 (UTC)
 * As long as you have a reliable source, I cannot stop you. Fleet Command (talk) 21:36, 30 November 2010 (UTC)

Criticism
This article lacks information about criticism of x86, as it has been criticized by various figures, such as Mike Johnson, David Patterson and John L. Hennessy.--RekishiEJ (talk) 10:41, 20 October 2010 (UTC)
 * Please kindly cite your sources. Fleet Command (talk) 17:40, 20 October 2010 (UTC)

Unsourced
There was a reason why an IP removed DDR4 from Haswell. It's unsourced. All a google search gave me was speculation. If no-one objects I'm removing it.Jasper Deng (talk) 16:36, 28 July 2011 (UTC)

Lead sentence makes no sense
"The generic term x86 refers to the most commercially successful instruction set architecture[1] in the history of personal computing. " So, if by some miraculous development, PowerPC becmes the most dominant instruction set in the world, it too can be called "x86"? 71.146.1.195 (talk) 22:38, 7 August 2009 (UTC)
 * I never myself interpreted it so technically, but if you do then I guess it makes no sense. By all means change it. Something like "x86 is the most commercially successful generic instruction set architecture..."--Spectatorbot13 (talk) 11:01, 8 August 2009 (UTC)
 * The lede sentence still does not define the subject per WP:LEDE. At least we've gotten "generic term" out of the way, but an x86 architecture is not x86 because its popular, but because it was derived from the 8086/80286/386 lineage of architectures. I'm not going to edit the lede sentence because i don't think I'm expert enough in the field, but the article should start with a definition, not a non-defining (albeit important) characteristic. 71.146.1.195 (talk) 06:59, 17 August 2009 (UTC)
 * I've changed it to term. x86 is not a Generic Trademark - it is a number, so cannot be trademarked (the whole reason intel moved to naming their chips), and it wasn't a brand name either. SmackEater (talk) 22:13, 8 October 2009 (UTC)
 * Ahh, this is what I did not know, though it makes sense numbers shouldn't and aren't allowed to be trademarked. Thank you for your contribution!--Spectatorbot13 (talk) —Preceding undated comment added 22:17, 8 October 2009 (UTC).
 * To make matters worse, x86 is -not- the most commercially successful instruction set architecture in the history of personal computing. If measured in sold units, ARM far surpasses x86 (I can't say anything about turnover).80.162.60.16 (talk) 02:33, 7 December 2011 (UTC)