User:Clemenzi/Books/CE PE Exam Study Guide II - Part 2b

Processors

 * Processors
 * Computer architecture
 * Harvard architecture
 * Processor design
 * Central processing unit
 * Arithmetic logic unit
 * CPU cache
 * Instruction set
 * Orthogonal instruction set
 * Classic RISC pipeline
 * Reduced instruction set computing
 * Instruction-level parallelism
 * Instruction pipeline
 * Hazard (computer architecture)
 * Bubble (computing)
 * Superscalar
 * Parallel computing
 * Dynamic priority scheduling
 * Amdahl's law
 * Benchmark (computing)
 * Moore's law
 * Computer performance
 * Supercomputer