User:Dspark76/WIPAND-OR-Invert



AND-OR-Invert (AOI) logic and AOI gates are two-level compound (or complex) logic functions constructed from the combination of one or more AND gates followed by a NOR gate. Construction of AOI cells is particularly efficient using CMOS technology where the total number of transistor gates can be reduced compared to the a same constructrion using NAND logic or NOR logic. The compliment of AOI Logic is OR-AND-INVERT (OAI) logic where the OR gates preceed an AND gate.

Logic operations
AOI gates perform one or more AND operations followed by a OR operation and then an inversion. For example, a 2-2 AOI gate can be respresented by the boolean equation and truth table:

$$F=\overline{(A \wedge B) \vee (C \wedge D)}$$

A 2-1 AOI gate can be represented by following the boolean equation and truth table:

$$F=\overline{ A \vee (B \wedge C)}$$

Larger AOI gates, such as 4-3 AOI or 3-3-3 AOI can also be used.

Electronic implementation
AOI gates can be readily implemented in CMOS circuitry. AOI gates are particularly advantaged in that the total number of transistors (or gates) is less than if the AND, NOT, and OR functions were implemented seperately. This results in increased speed, reduced power, smaller area, and potentially lower fabrication cost. For example, a 2-1 AOI gate can be constructed with 6 transistors in CMOS compared to 10 transistors using a 2-input NAND gate (4 transistors), an inverter (2 transistors), and a 2-input NOR gate (4 transistors).