User:Jcarroll/lab2

Dhrystone

 * dhry_jfc.c: Starting point for the Dhrystone benchmark and a few benchmark routines
 * dhry_2_jfc.c: Additional routines used in the Dhrystone benchmark

Switch Cache
The following files constituted the "custom project" for this lab.
 * switch_cache.c: Functions used to read and write LEDs and switches
 * main.c: Starting point for the custom project execution.

Performance
These files were used to run the various performance tests.
 * performance.c: Functions to read and write to memory, both with the cache enabled and disabled.
 * main.c: Starting point for the performance tests.

Questions

 * Create an experiment to estimate the bandwidth of the block memory (i.e. access to the block memory off the chip). Perform this experiment with the I-cache enabled and the D-cache disabled. How many clock cycles does it take to access data from the block memory? Perform a similar experiment but enable the DCache. Contrast the latency of accessing the block memory vs. the on-chip Dcache. :


 * Estimate the performance improvement of the I-cache. Describe your experiment for testing the performance improvements of the I-cache and discuss your results.

Therefore, the performance increase was 517/296 = 1.75.


 * Create an experiment to estimate the bandwidth of writing to the LEDs. For this experiment, repeatedly write some predetermined set of values to the LEDs in attempt to maximize the number transfers per second (even though this won’t be visible on the LEDs). Perform you experiment with the I-Cache and D-Cache disabled. How many clock cycles does it take to write to the LED I/O? Perform the same experiment with the I-Cache and D-cache enabled.

This test was run with the data cache both on an off. However, the data cache didn't make any difference to the transfer rate. This is because no data was read or written to or from memory. The bandwidth was about 14 MB/sec.

Problems Encountered

 * Network down for 45 min.