User:Krkrhax/sandbox



Chisel is an open-source hardware description language (HDL). It is a set of special class definitions, predefined objects, and usage conventions within the scala programming language. Using these constructs a developer writes a Scala program that generates a hardware graph. These circuit generators leverage the hard work of design experts and raise the level of design abstraction for developers. To express flexible and scalable circuit construction, circuit generators must employ sophisticated programming techniques to make decisions concerning how to best customize their output circuits according to high-level parameter values and constraints.

History
Chisel grew out of a need to support the development of RISC-V by a small team of graduate students at University of California, Berkeley. The language was developed by Jonathan Bachrach, Huy Vo, David Patterson, Krste Asanović and others. The initial version 1.0 was able to produced either verilog or a C++ code circuit emulation.