User:NickPearne/sandbox

Swithing Noise Jitter Signal Noise Jitter

[Introduction from Jitter in Wiki] In electronics and telecommunications, jitter is the deviation from true periodicity of a presumably periodic signal, often in relation to a reference clock signal. In clock recovery applications it is called timing jitter. [1] Jitter is a significant, and usually undesired, factor in the design of almost all communications links.

Signal Noise Jitter (SNJ) results from the aggregation of the variability of noise events in the time-domain on the output-voltage ripple. The ripple waveform exhibits jitter and noise carried on the ripple also jitters.

The influence of SNJ is accumulative in many modern digital communications creating an aggregation of variability of unwanted signals over time which will be digitized and stored in memory.

Contents 1	Signal Noise Jitter 1.1	Where SNJ Occurs 1.2	How does SNJ Arise 1.3	Issues associated with SNJ

2	Supply Bias Noise Primer for Switching-Noise-Jitter (SNJ) Measurement 2.1	Random jitter 2.2	Deterministic jitter 2.3	Total jitter 3	Examples 3.1	Sampling jitter 3.2	Packet jitter in computer networks 3.3	Compact disc seek jitter 3.4	Video and image jitter 4	Testing 5	Mitigation 5.1	Anti-jitter circuits 5.2	Jitter buffers 5.3	Dejitterizer 5.4	Filtering 5.5	Decomposition 6	See also 7	References 8	Further reading 9	External links

Where SNJ Occurs Many modern Sytem on Chip (SoC) and subsystems operate in power saving modes or pulsed applications as shown in Fig. 1  - the current drain is fluctuated in pulses. Typically a load enters high power state (e.g. RX/TX On) for tens of micro- to mini-seconds and is then switched to low power or standby mode for hundreds of mini- to tens of seconds. Some critical and noise-sensitive functions, for example high-precision system clocks (e.g. TCXO, DCXO), are designed to keep alive during the standby or power saving operations. Thus low noise supply bias is still required by this circuitry during the power saving mode in order to maintain systems performance consistency during wakeup from power-saving.

Figure 1: Typical current

How does SNJ Arise? Signal Noise Jitter (SNJ) is produced by the aggregation of the variability of noise events in the time-domain on the output-voltage ripple. SNJ is caused by noise present in control loop circuitry of DC-DC converters. SNJ can occur in switching regulators and in linear (LDO) regulators as noise causes dislocation in upslope and downslope timing of the sawtooth ripple waveform produced by switch-mode power supplies (SMPS), and ringing/transient events found as LDO regulators compensate for load current fluctuations. The ripple waveform exhibits jitter and noise carried on the ripple also jitters. The influence of SNJ is accumulative in many modern digital communications creating an aggregation of variability of unwanted signals over time which will be digitized and stored in memory. The SNJ signature therefore becomes a dominating influence on performance of noise-sensitive SoCs and circuit components after the ripple voltage has been suppressed.

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Issues associated with SNJ At present, modern switching DC-DC converters offer dual-mode operation by fixing the switching frequency (e.g. PWM) at full-load to ease noise filtering. When light-loads are present, they switch to power-saving mode, typically referred as pulse-frequency, pulse-skipping or frequency-reduction mode for increased efficiency. Nevertheless, this has the disadvantages of creating additional transient noise and momentary fluctuations in output voltage, as well as reduced efficiency due to the increased quiescent current required by complex mode-switching circuitry. To make things more difficult, the power-saving modes create a wide spectrum of noise at the output voltage that is difficult to filter.

2.	SNJ 	Measurement

Noise in the output of DC-DC converters is commonly determined by the output-voltage ripple, analytically expressed as peak-to-peak voltage or noise spectral density. FIG. 2 and FIG. 3 demonstrate the typical visual characteristics of the output from a switching regulator and a linear regulator (LDO) respectively. A saw-tooth ripple waveform is the consequence of LC filtering on the output of a switching regulator, while the output voltage fluctuations of a LDO are typically Accompanied with overshoots and undershoots in a pulsed application.

Supply Bias Ripple – Choosing between LDO and a switching regulator The ripple present on the DC supply bias provides a major challenge for noise-sensitive circuitry design. Ripple changes due to load fluctuation must be allowed for and there are critical tradeoffs to be made between system performance, efficiency, space, cost, and time. As a result, LDO regulators are commonly used to power most RF applications and noise-sensitive circuitry because the supply bias noise is generally lower than switching regulators. However, LDO is much less efficient in power conversion than a switching regulator.

FIG. 4 compares the supply bias noise (ripple) in a GPS application as measured by a spectrum analyzer. The primary bias voltage is provided respectively by a LDO and by a switching regulator. The frequency range of the noise spectrum for both is very similar, lying below 1MHz. However, the noise amplitude of the LDO is about 20dB lower than the switching regulator. So in general practice, the primary bias voltage provided by the LDO is expected to perform better and is generally used to build a golden reference unit. A switching regulator may be used to replace the LDO thereby achieving higher conversion efficiency but presenting tradeoffs in performance.

The LDO is able to provide a low-noise bias, but only when the DC load is constant. In practise of course, the current draw of a load will fluctuate. Careful examinations of the supply bias of pulsed applications will show that transient noise is, in fact, present, as shown in FIG. 5, and this is difficult to filter. Powering a noise-sensitive SoC or circuit component in a pulsed application with an LDO may well turn out to be a suboptimal solution: in addition to low conversion efficiency transient noise is present on the supply bias.

We need the image

When observed on an oscilloscope, the saw-tooth waveform of a Pulse Frequency Mode (PFM) Switch Mode Power Supply (SMPS)  with SNJ will appear as shown in FIG. 6. Abnormalities occurring in the time-domain allow the switching events to “move”. Since the converter is PFM type, the switching frequency as shown on the oscilloscope moves with the fluctuation of the load. This makes it impossible to discriminate how much of the movement of the waveform in t1 and S1 (need to define these) is caused by the load and how much by the noise in the control loop circuitry.

The Impact of SNJ Conditioning

The waveform in FIG. 7 demonstrates the outcome from the same setup with SNJ conditioning in place: the variability of t0 and S0 (idem) are substantially reduced.

Digital Phosphor (DPX) Measurement Thanks to the introduction of event density as an additional measurement dimension, a DPX plot can be used to discriminate between load-induced and jitter-induced movement of the waveform. DPX Spectrum display adds an additional dimension to frequency and amplitude. The color temperature spectrum (“Z” axis) shows the number of occurrences of signals (or ‘event density’) over a set period of time. Z-axis scaling adjustments for maximum and minimum occurrence values can be manipulated to discriminate visually between different signals beneath the maximum amplitude. Fig. 8 shows the DPX plot of the supply bias waveform shown in Fig. 8. The event density of interest can be determined by setting the boundary parameters of the sampling box, and the distortion of the intermediate (green/yellow) bands on the bitmap is clearly visible.

Fig 8 DPX of Supply Noise with SNJ Present

Measuring Noise and SNJ A measurement box, defined by the horizontal frequency range and vertical amplitude range, is used to contain and measure the average event density over a period of time. In this example, FIG 9, FIG. 10 and FIG. 11, the measurement period is set to infinite (i.e. the system collects SNJ continuously on the DPX display until stop). This measurement technique enables the identification and measurement of SNJ in the supply bias provided by the switching regulator both qualitatively and quantitatively.

Consider the signal density produced by the switching frequencies on the left hand side of the trace (i.e. the raised colored area). Ripple events at the maximum levels of amplitude are indicated as blue and are seen clearly at the lowest end of the signal frequency spectrum: in fact most analog circuits have effective PSRR (power supply rejection ratio) to suppress ripple at low frequencies. Ripple amplitude may be further reduced by increasing the capacitance value and lowering the ESR of the output capacitor. With the amplitude of the ripple suppressed, SNJ becomes the ‘last mile’ noise component and is the dominant influence on noise-sensitive applications or circuit components. It is SNJ that prevents a noise-sensitive application powered by a switching regulator to achieve equivalent, if not better performance to that achieved by a low-noise LDO (Des- the output capacitor forms an LC filter with the inductor exhibiting bandpass properties over a specific and narrow range of frequencies. Your statement is true in the case of PWM, but in PFM the frequency is changing all the time. So can we state that ripple is effectively attenuated in a PFM device?). The presence of SNJ produces abnormalities with lower dB amplitudes, but these have higher event density or frequency of occurrence -represented in the color bitmap from the green through yellow and into red, the highest event density. Events shown beyond the switching frequencies, i.e. further along the x-axis are not caused by SNJ but conventional noise due to well-known causes such as grounding, ringing, parasitics, and probe interference.

Fig. 9 Zoom in to the SNJ Measurement Box

The diagram of FIG. 9 zooms into the measurement box of Fig. 8 where the green and yellow zones are seen to be expanded and the event density is about 8%. This expansion indicates abnormality in the time-domain component of the saw-tooth waveform or ripple. This abnormality is caused by the variability of timing which occurs when a PFM controller changes frequency in response to a change of the load. This movement in the time-domain is ‘unveiled’ by the DPX plot as ‘rate of occurrence’ or event density.

The crucial noise reduction, achieved when the SNJ is conditioned, can be seen clearly in FIG 10. The reading of the event density has been reduced by 50% to about 4% by SNJ conditioning.

Fig 10. After SNJ Conditioning

In summary, the unique supply bias noise profile provided by the Symphony A2(1) chipset enables replacement of low efficiency linear DC regulators by highly efficient switch-mode PFM-type DC-DC conversion, without compromising the performance of noise-sensitive pulsed circuitry in low-power remote, portable, wearable, IoT and UAV applications. In addition, the SNJ capabilities of the Harmony module offer opportunities for reduction/elimination of data convolution errors in high speed ADC applications.