User:Penguinair/Books/CAD


 * Design Flow
 * Design flow (EDA)
 * Post-silicon validation
 * Power optimization (EDA)
 * Routing (electronic design automation)


 * Electronic Design Automation
 * Electronic design automation


 * Design
 * High-level synthesis
 * Logic synthesis
 * Register-transfer level
 * Netlist
 * Schematic capture
 * Placement (EDA)


 * Simulation
 * Electronic circuit simulation
 * SPICE
 * Logic simulation
 * Hardware emulation
 * Technology CAD
 * Circuit extraction
 * Electromagnetic field solver


 * Analysis and verification
 * Functional verification
 * Clock domain crossing
 * Formal verification
 * Formal equivalence checking
 * Static timing analysis
 * Physical verification
 * Mesh analysis


 * Manufacturing preparation
 * Resolution enhancement technologies
 * Optical proximity correction
 * Mask data preparation
 * Automatic test pattern generation
 * Built-in self-test
 * Integrated circuit design
 * Circuit design


 * Suppliers and Tools
 * Synopsys
 * Cadence Design Systems
 * Verilog
 * VHDL
 * Mentor Graphics
 * GDSII
 * OrCAD


 * Logic
 * Logic family
 * Logic gate
 * Dynamic logic (digital electronics)
 * Resistor–transistor logic
 * Direct-coupled transistor logic
 * Diode–transistor logic
 * High Threshold Logic
 * Emitter-coupled logic
 * Gunning transceiver logic
 * Transistor–transistor logic
 * PMOS logic
 * NMOS logic
 * Depletion-load NMOS logic
 * CMOS
 * BiCMOS
 * Integrated injection logic