User:Rainglasz/Colpitts-Oscillator

This oscillator is similar to the Vackar oscillator.

Oscillator design
Different variants are possible, that are explained in the following examples.

Numbers are in general rounded to two significant digits.

Conditions
The frequency of oscillation should be 1MHz. Thus, a coil of 126µH and a capacitor of 200pF are used, giving a nominal frequency of oscillation of 1.003 MHz.

The resonance resistance of the tank circuit is $$ \sqrt{L/C} = 797\Omega \approx 800\Omega$$ if the quality factor is 1. In case the quality factor is 50, the equivalent parallel damping resistor (and thus the impedance in parallel resonance) is 40k&Omega;, or 16&Omega; for the series equivalent.

JFET in common source circuit


This variant is equivalent to the the classical configuration with at vacuum tube. It uses a JFET in Common_source topology (equivalent to common cathode topology). L1, C2 and C3 are connected in series and provide the tank circuit. The common ends of the voltage divider formed from C2 and C3 is grounded. Thus, the voltages at the opposite ends of C2 and C3 are of opposite phase. These are connected to the output of the amplifier JFET J1, and to the gate input. Because in common source topology, the voltages at gate and drain are of opposite phase, the feedback is in phase: the circuit can oscillate, as far as the phase is concernde. C1 connects the gate, while R2 keep the gate biased to ground.

C2 is signifcantly larger as C3, so that the frequency of oscillation is dominated by C3. Although the gate capacity of a JFET (and of a tube) is relative small (approx. 5pF), it is temperature dependent; by having it parallel to a larger fixed capacitor, its changes are less relevant.

As the frequency is determined by the series of C3 and C2, the value of C3 had been increased from 200pF to 220pF, resulting in nominally 198pF, and leaving 2pF for stray capacitance. The full amplitude of the tank circuit (as present on L1) is divided by C2 and C3; the feedback voltage on the gate is 1/10 of that value, and 1/9 of the (AC) voltage on the amplifier output (drain). Thus, the amplifier must have a minimal amplification of 10.

When the gate is at 0V, the choosen JFET 2N3819 has a forward transconductance g=6mA/V. Using a load resistor R1=2k&Omega; results in a voltage amplification g*R1=12, so that the circuit can oscillate, as the total amplification of 12/9 is larger than unity.

At this operational point, the drain current and thus the current through R^2 is 10mA, resulting in a voltage drop of 20V on R2. Because the JFET requires at least 3V between drain and source, the supply voltage is choosen to be V1=24V. Lower supply voltages are only possible if R2 is made smaller and, to maintain a sufficient gain, C2 also made smaller.

As the resonance resistance of the tank circuit is parallel to the load resistor R1, the effective load resistor is smaller, resulting in smaller gain. If the quality factor is 50, as is realistic, the resonance resisitance is 40k&Omega; and can be neglected.

Instead of an ohmic resistor R1, an inductor can be used. As the dynamic (AC) resistance has to be 2k&Omega;, the inductor should be at least 330µH. This, however, increases the oscillation frequency (e.g. from 0.998 to 1.11 MHz), because this inductance is parallel to the first one, and thus the resulting inductance is lower. The major advantage is that the supply voltage can be reduced to 5V, because the DC voltage drop is neglectible. If 1200µH is used instead, the frequency shift is smaller, but the aplification much higher, so that C2 should be increased to 10nF to avoid to much overloading of the amplifier.

As output, the gate is recommended, as capacitive or resistive load has the smallest influence here. But the Output voltage is rather small (100mV). Instead, a second JFET could be used as a source follower to take the much higher voltage from the drain, but the distortions are higher here, compared to the drain.