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State Encoding is one of the crucial step during Finite-state machine(FSM) synthesis where each defined state is encoded into a unique pattern of one’s and zeros. Traditionally design criteria for FSM synthesis was either speed, area or both. With technology advancement, density and speed of integrated circuit have increased exponentially which is following Moore's law. With this power dissipation inevitably has increased, which forced designers for portable computing devices, and high speed processors, to consider power dissipation as a critical parameter during design consideration.

Background
Synthesis of FSM involves 3 major steps,
 * 1) State minimization: As name suggests the number of states required to represent FSM is minimized. Various techniques/algorithms like Implication table, Row matching, Successive partitioning algorithm, identify and remove equivalent or redundant states.
 * 2) State assignment: State assignment or encoding involves choosing boolean representations of the internal states of FSM. In other words it assigns unique binary code to each state. Selection of right encoding technique is very critical, since wrong decision may result in FSM that uses too much logic or are is too slow or consumes more power or any combination of these.
 * 3) Combinational logic minimization: This step uses unassigned state-codes as don't care in order to reduce the combinational logic.

Existing encoding techniques
Following are some of the techniques which are widely used for state encoding, In one hot technique, only one of the bits of the state variable is "1" (hot) for any given state. All the other bits are "0". Hamming distance of this techniques is 2. One Hot requires one flip-flop for every state in FSM. As a result, the state machine is already “decoded,” so the state of the machine is determined simply by finding out which flip-flop is active. This encoding technique reduces the width of the combinatorial logic and, as a result, the state machine requires fewer levels of logic between registers, reducing its complexity and increasing its speed.
 * One hot encoding

In binary encoding number of bits (b) per state depends on number of states (n). The relationship is defined by the equation: b = log2(n) In this technique, the states are assigned in binary sequence where the states are numbered starting from binary 0 and up. Clearly, the number of flip-flops used is equal to the number bits(b). Since Binary encoding uses the minimum number of bits (flip-flops) to encode a machine the flip-flops are maximally utilized. As a result, more combinatorial logic is required to decode each state when compared to One Hot. Requires less number of flip-flops when compared to One hot but hamming distance can be as worse as number of bits(b).
 * Binary encoding

In Gray code, also known as reflected binary code, state are assigned such that consecutive state codes differ by only one bit. In this encoding also the relationship between number of bits and the number of states is defined by 				b = log2(n) Number of flips-flops used and the complexity of the decoding logic is same as Binary encoding. But the hamming distance in Gray code is always 1.
 * Gray Encoding

Output based encoding, MUSTANG, NOVA,
 * Other encoding techniques

Motivation for Low Power based State Encoding techniques
Main idea in the design of state encoding for low power is to minimize hamming distance of the most probable state transitions which reduces switching activity. Thus, a cost model for minimizing power consumption is to have Minimum Weighted Hamming Distance(MWHD).

For counters Grey coding gives minimum switching activity thus suitable for low power designs. Grey encoding suits best when state change are sequential. In arbitrary state changing FSM Grey code fails for low power designs. For such FSM, One hot encoding guarantees switching of two bits for every state change. But since number of state variables needed is equal to the number of state. As state increases One hot encoding becomes impractical solution, mainly because with increased number of inputs and outputs to the circuit, complexity and capacitive load increase. Binary coding is worst for low power since the maximum hamming distance is equal to number of state variables.

Recent studies have lead to several state encoding techniques which focus on reducing the switching activity during state transitions.

Column based approach for Low power State assignment
This approach aims to reduce power dissipation by sequential circuits by choosing state assignment which minimizes the switching activity between state transitions. Thus the combinational part of FSM has lower input transition probability and is more like to give low power dissipation when synthesized. This algorithm uses boolean matrix with rows corresponding to state codes and column corresponding to state variables. Single state variable is considered at a time and try to assign it's value to each state in FSM, in a way which is likely to minimize the switching activity for the complete assignment. This procedure is repeated for the next variable. Since minimization technique is applied column by column this technique is called as Column based.

Multi-code state assignment
Multi-code state assignment technique implements priority encoding by restraining redundant states. Thus state can be encoded using fewer state variables (bits). Further, flip-flops corresponding to those absent state variables can be clock-gated.

Profiling Based State Assignment
This technique utilizes dynamic loop information extracted from FSM profiling data for state assignment in-order to reduce switching activity. Following are the steps this technique uses,
 * 1) FSM state profiling collects information about the dynamic behavior of the FSM for a relevant input data set
 * 2) Loop detection searches for loops in the state trace and each loop is stored and counted to obtain the frequency of the loops.
 * 3) State assignment assigns state variables to each state based on the data gathered in the first two steps in order to minimize the switching activity. There are three algorithm to assign state variables,
 * Basic DFS state assignment algorithm
 * Loop-based DFS state assignment algorithm
 * Loop-based per-state heuristic state assignment algorithm

Other Techniques

 * Some techniques encode state transition graph(STG) to produce Two- and Multi-Level implementations targeting low power
 * Techniques to Re-Encoding logic-level Sequential Circuits to reduce Power Dissipation have been proposed.
 * Spanning Tree based State encoding, Depth_First Method , Minimum distance Method , 1_Level Method , 1_level_tree Method , where focus is again on assigning state variables to the different states such that switching activity due to state transition is reduced.
 * Apart from just encoding states for Low power some techniques involve decomposition of FSM into two or more sub-machines such that only one of which is active most of the time. Taking advantage of this, other sub-machine can be either clock gated or power gated..