User:SahanaBarike/sandbox/Non-Secure Boot

Non Secure Boot
This page gives a detailed explanation on booting QEMU in Non-Secure mode using different boot devices like:

- QSPI24

- NAND

- SD

QSPI24 Boot
1.	Set the Petalinux environment using the following command

$source /settings.sh

2. Create a bif file “QSPI_R5_0.bif” with the following contents: $cat QSPI_R5_0.bif the_ROM_image: {  [fsbl_config] r5_single [bootloader] R5_FSBL.elf [destination_cpu=r5-0] R5_core0_hello_world.elf } 3.	Run the bootgen tool to generate the bin file

$ bootgen -r -w –image ./QSPI_R5_0.bif -o Boot.bin

4.	Create the QEMU QSPI single mode boot image

$ dd if=/dev/zero of=qemu_qspi_R5_0.bin bs=32M count=1 1+0 records in 1+0 records out 33554432 bytes (34 MB) copied, 0.300993 s, 111 MB/s $ dd if=Boot.bin of=qemu_qspi_R5_0.bin bs=1 seek=0 conv=notrunc 87448+0 records in 87448+0 records out 87448 bytes (87 kB) copied, 3.14043 s, 27.8 kB 5.	Now the QEMU QSPI single mode boot image qemu_qspi_R5_0.bin can be used for the execution on QEMU 6.	Execute the application on R5 core-0 using the following command

$ qemu-system-aarch64 -nographic -M arm-generic-fdt -dtb ./xilinx-ronaldo-arm.dtb -device loader,file=R5_FSBL.elf,cpu=4 -device loader,addr=0xff5e023c,data=0x80008fde,data-len=4 -device loader,addr=0xff9a0000,data=0x80000218,data-len=4 -mtdblock qemu_qspi_R5.bin -boot mode=1

Xilinx Resticted QEMU Sep 29 2014 20:00:35. This QEMU binary and its source are restricted to Xilinx internal use only. Do not delete this message in source. Contact the Xilinx QEMU Maintainer (git-dev@xilinx.com) for details on publishing QEMU contributions to customers.

Xilinx First Stage Boot Loader Release SW Beta1 	Feb 5 2015-12:13:50 Platform: QEMU, RTL Version: 400 Cluster ID 0x80000004 Running on R5-0 Processor Processor Initialization Done

In Stage 2

QSPI 24bit Boot Mode

QSPI is in single flash connection

Single Flash Information

FlashID=0x20 0xBB 0x19

MICRON 256M Bits

Multiboot Reg : 0x0

QSPI Reading Src 0x44, Dest FFFF6574, Length 4

.QSPI Reading Src 0x98, Dest FFFF6550, Length 4

.Image Header Table Offset 0x8C0

QSPI Reading Src 0x8C0, Dest FFFF1690, Length 40

.*****Image Header Table Details******** Boot Gen Ver: 0x1020000 No of Partitions: 0x4 Partition Header Address: 0x260 Partition Present Device: 0x0 QSPI Reading Src 0x980, Dest FFFF16D0, Length 40 .QSPI Reading Src 0x9C0, Dest FFFF1710, Length 40 .QSPI Reading Src 0xA00, Dest FFFF1750, Length 40 .QSPI Reading Src 0xA40, Dest FFFF1790, Length 40 .Initialization Success

= In Stage 3, Partition No:1
= UnEncrypted data Length: 0x2 Data word offset: 0x2 Total Data word length: 0x2 Destination Load Address: 0x10223C Execution Address: 0x100000 Data word offset: 0x4C9E Partition Attributes: 0x508 QSPI Reading Src 0x13278, Dest 10223C, Length 8 .Partition 1 Load Success

= In Stage 3, Partition No:2
= UnEncrypted data Length: 0x25 Data word offset: 0x25 Total Data word length: 0x25 Destination Load Address: 0x0 Execution Address: 0x0 Data word offset: 0x4CA0 Partition Attributes: 0x508 Address 0xFFE00000, Length 10000, ECC initialized QSPI Reading Src 0x13280, Dest FFE00000, Length 94 .Partition 2 Load Success

= In Stage 3, Partition No:3
= UnEncrypted data Length: 0x894 Data word offset: 0x894 Total Data word length: 0x894 Destination Load Address: 0x100000 Execution Address: 0x0 Data word offset: 0x4CD0 Partition Attributes: 0x508 QSPI Reading Src 0x13340, Dest 100000, Length 2250 ...Partition 3 Load Success All Partitions Loaded

=
==== In Stage 4 ============ Running Cpu Handoff address: 0x100000, Exec State: 8 Exit from FSBL Hello World

NAND Boot 1.	Set the Petalinux environment using the following command $source /settings.sh 2.	Create a bif file “NAND.bif” with the following contents: $cat NAND.bif the_ROM_image: { [fsbl_config] a5x_x64 [bootloader] ron_a53_fsbl.elf [destination_cpu=a5x-0] hello_world.elf }

3.	Run the bootgen tool to generate the bin file $ bootgen -r -w –image ./NAND.bif -o Boot.bin 4.	Create the NAND boot image $ dd if=/dev/zero of=nand.bin bs=1G count=4 4+0 records in 4+0 records out 4294967296 bytes (4.3 GB) copied, 50.9095 s, 84.4 MB/s $ dd if=Boot.bin of=nand.bin bs=1 seek=0 conv=notrunc 170980+0 records in 170980+0 records out 170980 bytes (171 kB) copied, 0.168898 s, 1.0 MB/s 5.	Execute the qemu-nand-creator to convert the binary file to NAND image $ qemu-nand-creator 16384 < nand.bin > qemu_nand.bin (87 kB) copied, 3.14043 s, 27.8 kB/s 6.	Now the QEMU NAND mode boot image qemu_nand.bin can be used for the execution on QEMU 7.	Execute the application on A53 core-0 using the following command $ qemu-system-aarch64 -nographic -M arm-generic-fdt -hw-dtb ronaldo-singlearch-arm.dtb -device loader,file=./fsbl_a530.elf,cpu=0 -device loader,addr=0xfd1a0104,data=0x8000000e,data-len=4 -pflash qemu_nand.bin -boot mode=4

Xilinx Restricted QEMU Feb 13 2015 16:19:45. This QEMU binary and its source are restricted to Xilinx internal use only. Do not delete this message in source. Contact the Xilinx QEMU Maintainer (qemu-dev@xilinx.com) for details on publishing QEMU contributions to customers.

WARNING: Image format was not specified for 'qemu_nand.bin' and probing guessed raw. Automatically detecting the format is dangerous for raw images, write operations on block 0 will be restricted. Specify the 'raw' format explicitly to remove the restrictions. DDR test pass Xilinx First Stage Boot Loader Release SW Beta1 	Feb 11 2015-18:14:27 Platform: QEMU, RTL Version: 400 Cluster ID 0x80000000 Running on A53-0 Processor Processor Initialization Done

=
==== In Stage 2 ================= NAND Boot Mode Manufacturer: MICRON     MT29F32G08ABCDBJ4   , Device Model: MT29F32G08ABCDBJ4  , Jedec ID: 0x2C Bytes Per Page: 0x4000 Spare Bytes Per Page: 0x4C0 Pages Per Block: 0x100 Blocks Per LUN: 0x418 Number of LUNs: 0x1 Number of bits per cell: 0x1 Number of ECC bits: 0x1 Block Size: 0x400000 Number of Target Blocks: 0x418 Number of Target Pages: 0x41800 Nand Init Success Multiboot Reg : 0x0 Image Header Table Offset 0x8C0 Boot Gen Ver: 0x1020000 No of Partitions: 0x5 Partition Header Address: 0x260 Partition Present Device: 0x0 Initialization Success
 * Image Header Table Details********

= In Stage 3, Partition No:1
= UnEncrypted data Length: 0x6C8 Data word offset: 0x6C8 Total Data word length: 0x6C8 Destination Load Address: 0x0 Execution Address: 0x0 Data word offset: 0x7ED2 Partition Attributes: 0x100 Partition 1 Load Success

= In Stage 3, Partition No:2
= UnEncrypted data Length: 0x23A Data word offset: 0x23A Total Data word length: 0x23A Destination Load Address: 0x1B40 Execution Address: 0x0 Data word offset: 0x85A0 Partition Attributes: 0x100 Partition 2 Load Success

= In Stage 3, Partition No:3
= UnEncrypted data Length: 0x1F02 Data word offset: 0x1F02 Total Data word length: 0x1F02 Destination Load Address: 0x2440 Execution Address: 0x0 Data word offset: 0x87E0 Partition Attributes: 0x100 Partition 3 Load Success

= In Stage 3, Partition No:4
= UnEncrypted data Length: 0x9 Data word offset: 0x9 Total Data word length: 0x9 Destination Load Address: 0x1AB4 Execution Address: 0x0 Data word offset: 0xA6F0 Partition Attributes: 0x100 Partition 4 Load Success All Partitions Loaded

=
==== In Stage 4 ================= Running Cpu Handoff address: 0x0, Exec State: 0 Exit from FSBL Hello World

SD Boot 1.	Set the Petalinux environment using the following command $source /settings.sh 2.	Create a bif file “SD.bif” with the following contents: $ cat SD.bif the_ROM_image: { [fsbl_config] a5x_x64 [bootloader] ron_a53_fsbl.elf [destination_cpu=a5x-0] A53_core0_hello_world.elf } 3.	Run the bootgen tool to generate the bin file $ bootgen -r -w -image SD.bif -o Boot.bin 4.	Create the QEMU SD boot image $ dd if=/dev/zero of=qemu_sd.img bs=128M count=1 1+0 records in 1+0 records out 134217728 bytes (134 MB) copied, 1.23445 s, 109 MB/s $ mkfs.vfat -F 32 qemu_sd.img mkfs.fat 3.0.26 (2014-03-07) $ mcopy -i qemu_sd.img Boot.bin ::/ 5.	Now the QEMU SD mode boot image qemu_sd.img can be used for the execution on QEMU 6.	Execute the application on R5 core-0 using the following command $ qemu-system-aarch64 -nographic -M arm-generic-fdt -dtb ./xilinx-ronaldo-arm.dtb -device loader,file=ron_a53_fsbl.elf,cpu=0 -device loader,addr=0xfd1a0104,data=0x8000000e,data-len=4 -sd qemu_sd.img -boot mode=5

Xilinx Resticted QEMU Sep 29 2014 20:00:35. This QEMU binary and its source are restricted to Xilinx internal use only. Do not delete this message in source. Contact the Xilinx QEMU Maintainer (git-dev@xilinx.com) for details on publishing QEMU contributions to customers.

Xilinx First Stage Boot Loader Release SW Beta1 	Jan 29 2015-14:44:00 Platform: QEMU, RTL Version: 400 Cluster ID 0x80000000 Running on A53-0 Processor Processor Initialization Done

=
==== In Stage 2 ============ SD Boot Mode SD: rc= 0 File name is BOOT.BIN Multiboot Reg : 0x0 Image Header Table Offset 0x8C0 Boot Gen Ver: 0x1020000 No of Partitions: 0x5 Partition Header Address: 0x260 Partition Present Device: 0x0 Initialization Success
 * Image Header Table Details********

= In Stage 3, Partition No:1
= UnEncrypted data Length: 0x6CE Data word offset: 0x6CE Total Data word length: 0x6CE Destination Load Address: 0x0 Execution Address: 0x0 Data word offset: 0x7ED2 Partition Attributes: 0x100 Partition 1 Load Success

= In Stage 3, Partition No:2
= UnEncrypted data Length: 0x23A Data word offset: 0x23A Total Data word length: 0x23A Destination Load Address: 0x1B40 Execution Address: 0x0 Data word offset: 0x85A0 Partition Attributes: 0x100 Partition 2 Load Success

= In Stage 3, Partition No:3
= UnEncrypted data Length: 0x1F02 Data word offset: 0x1F02 Total Data word length: 0x1F02 Destination Load Address: 0x2440 Execution Address: 0x0 Data word offset: 0x87E0 Partition Attributes: 0x100 Partition 3 Load Success

= In Stage 3, Partition No:4
= UnEncrypted data Length: 0x9 Data word offset: 0x9 Total Data word length: 0x9 Destination Load Address: 0x1AB4 Execution Address: 0x0 Data word offset: 0xA6F0 Partition Attributes: 0x100 Partition 4 Load Success All Partitions Loaded

=
==== In Stage 4 ============ Running Cpu Handoff address: 0x0, Exec State: 0 Exit from FSBL Hello World running on A53 core 0