User:Salekin.sami36/sandbox

= Antenna in Package = Antenna in package (AiP) is a type of antenna where an antenna is combined with a highly integrated radio die into a standard surface mounted chip-scale package device. AiP solution is a subset of System in a package solution which bundles multiple integrated circuits and passive component in a single package. As antenna radiation doesn't necessarily improve with technology scaling, AiP solution is studied separately. The antenna in package solution is superior to the discrete antenna approach in the miniaturization of the wireless system in the planar dimensions.

Structure
Due to inherently large parasitic effects, Dual in line package is not suitable for many Antennas in package designs, as a result the challenge is to integrate an antenna in a surface-mounted package. The integrated antenna can be of many forms but usually the antenna types such as dipole, monopole, loop, slot, Yagi-Uda, and patch, which can be quickly designed or modified for the application. . Packages can be divided into two categories: leaded and leadless packages. Leaded packages have signiﬁcant parasitic effects, limiting their applications in AiP technology. Leadless packages offer a tremendous size advantage over leaded counterparts and a signiﬁcant performance advantage due to the reduced parasitic effects. Interconnects between the die and the antenna in an AiP involve pads, bonds, traces, and vias. Wires or bumps are implemented with the wire-bonding or ﬂip-chip technique. The ﬂip-chip technique has better electrical performance than the wire-bonding technique because the height of a bump is smaller than the length of wire, and the diameter of a bump is thicker than that of a wire. Traces form transmission lines, such as CPW, strip, and microstrip lines. They are routed in multiple layers, and vertical transitions are unavoidable. A coax via is the most reliable vertical transition between traces on different layers.

Fabrication
LTCC technology has been widely used to fabricate AiP because it offers a low-loss substrate, good thermal conductivity, and a high degree of passive integration. However, LTCC is relatively expensive, and for many consumer electronics applications, the higher cost is prohibitive. There have also been the developments in fan-out wafer level packaging (FOWLP) technology to meet the demand of modern semiconductor chips. The most prominent FOWLP technology is the eWLB, which has proved to be an alternative approach to fabricating AiP in high volume with low cost.