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Derating guidelines for Li-ion batteries

Derating refers to the reduction of electrical, thermal, and mechanical stresses applied to a part in order to decrease the degradation rate and prolong the expected life of the part [2]. It is an efficient approach to reduce the degradation rate, minimize failures, and reduce business risks, and has been applied to almost all electronic components, including resistors, diodes, transistors, light-emitting diodes, CPUs, and capacitors. Many derating standards or specifications have been developed for electronic components [3]. For example, Freescale provides voltage and frequency derating guidelines for the MPC7447A microprocessor [4], and Hitachi provides guidelines for derating of temperature, humidity, voltage, and current for high-voltage integrated circuits [5]. Li-ion batteries have the potential to shape global demand for fossil fuels, increase the use of renewables in the electric grid by buffering the intermittent and fluctuating green energy supply, bring convenient electric power to portable consumer electronics devices, and enable the broad commercial launch of electric vehicles. These guidelines are valuable for engineers designing products, but no guidelines are available for derating of Li-ion batteries.

Storage and cycling are the most common operating modes for Li-ion batteries, therefore, derating of Li-ion batteries refers to reducing the battery degradation rate and prolonging battery life under the two operating modes by reducing the environmental stresses and electrical stresses. Since capacity is the most important performance metric, it is selected as the battery health indicator, based on which the Li-ion battery derating is investigated.

In order to investigate the effectiveness of derating for life improvement, a metric such as derating factor needs to be defined. A derating factor has been defined as the ratio of the difference between the capacity loss under the derated stress and the capacity loss under the reference or maximum design stress to the capacity loss under the reference or maximum design stress at a specific time t,

DF(t) = [QL,D(t) – QL,R(t)] / QL,R(t0),

where QL,D(t) and QL,R(t) are the battery capacity loss at time t under the derated stress and reference stress, respectively.

The derating factor declines against the decreasing temperature and SOC. Both temperature and SOC can be derated to prolong battery calendar life.

1.         Du, J.; Zhang, X.; Wang, T.; Song, Z.; Yang, X.; Wang, H.; Wu, X. Battery degradation minimization oriented energy management strategy for plug-in hybrid electric bus with multi-energy storage system. Energy, 2018, 165, 153–163, doi:10.1016/j.energy.2018.09.084.

2.         Instructions for EEE Parts Selection, Screening, Qualification and Derating (EEE-INST-002). URL: https://nepp.nasa.gov/docuploads/FFB52B88-36AE-4378-A05B2C084B5EE2CC/EEE-INST-002_add1.pdf.

3.         Recommended practice for maintenance, testing, and replacement of valve-regulated lead-acid batteries for stationary applications (IEEE 1188). Available online: https://standards.ieee.org/project/1188.html (accessed on November 20, 2018).

4.         Freescale Semiconductor. MPC7447AECS01AD specification. 2018-11-07. URL: https://www.nxp.com/docs/en/data-sheet/MPC7447AECS01AD.pdf. (accessed on 7 November 2018).

5.         Hitachi. Instructions for use of Hitachi high-voltage monolithic ICs. 2018-11-07. Available online: http://www.hitachi-power-semiconductor-device.co.jp/en/products/ic/pdf/Instructions_for_Use_EN.Available online: (accessed on 7 November 2018).