User talk:BryceMW-CA

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Instruction set field of x86 processor infoboxes
One of the projects that I am working on right now is to update the infoboxes of x86 CPUs to be more consistent in how they present the instruction set and extensions. Since this spans multiple pages, there's no obvious place for me to put my explanation for anyone who is concerned with my edits so I am explaining here. I am mostly interested in consistency rather than any particular format so please reply here if you would prefer something different so I can go and update all of the pages.

So far, I have made a decision on what to consider the "Instruction Set". I am including x86-16, IA-32, and x86-64. Obviously, there is a naming debate about each of these (has this ever been hashed out on Wikipedia?). I originally used x86-32 instead of IA-32 for consistency but someone went around and changed all of the pages where I had done that to IA-32. I don't really care what name is chosen so I have decided to go with that from here on. I think that using IA-32 even on AMD pages is acceptable.

If a processor supports only one of Real Mode or VM86 mode (outside of the 16-bit processors where Real Mode is the only mode), I would add a note about that. Similarly for any processors that only support one of Legacy Mode or Compatibility Mode (excluding non-64 bit processors of course). Because these names are terrible (and I haven't even checked if AMD has different names), there aren't really any Wikipedia pages that properly explain what the difference is. Maybe that is something that I need to change. There are multiple of these names that could be used as well. I mainly went with these based on how Intel marks which instructions are valid in which modes in their architecture manual. They label Compatibility Mode as the sub-mode of IA-32e that runs "legacy protected mode software". Legacy Mode isn't even defined as far as I can tell but must be referring to running code directly in protected mode (i.e. a 32-bit operating system running 32-bit code). Maybe I should go with different names but as far as I can tell, there are no processors with these particular exceptions right now. The coprocesssor formats of the Xeon Phi don't support either Real Mode or VM86 mode. The host processor forms do support Real Mode and presumably VM86 mode but I'm not entirely sure.

Hope this helps, I appreciate any feedback on this. I'll add an update once I get to dealing with extensions since they will be much harder to classify. &mdash; Bryce (Talk) 17:22, 15 May 2024 (UTC)