User talk:Jopedia

Seymour Cray
The fact you added to Seymour Cray is sufficiently amazing that it requires a verifiable very reliable source cite. Please see WP:RS, WP:V, and WP:CITE, which are among the references for editing articles above. If you have any questions, you can put them here, or on my talk page. —EncMstr 00:34, 16 December 2007 (UTC)


 * I myself only found out about 6 years ago. The only proof I have are letters from Control Data Corporation back in 1971 acknowledging the speed and logic claims of my design / schematic.  I had no idea Cray was in charge of the Control Data Designing & Engineering Headquarters back then.  But after seeing my schematic on the Internet about six years ago, I did some research.  Turns out Seymour Cray left with Control Data’s blessing plus a several hundred thousand dollar grant to start up Cray Research in 1972, which of course introduced the first Cray supercomputer just a few years later.


 * I do remember when the Cray-1 was introduced, noticing the exact specs of my circuit and also the circular design, which was unique. My circuitry was designed in such a fashion.  Control Data had my schematic for about 8 months before sending it back saying it was a good solid design but would not be feasible to incorporate in their CDC 3000 series line.  I had no idea Cray would branch off and use my exact circuit to create an entirely new computer line.  Such are the tactics of big business.


 * I thought to myself at that time, “If CDC had jumped on it, they would have a computer with those exact speeds.” Now, after spending 35 years building / designing / and repairing high-speed computers, I know it would not have been possible for Cray to start from scratch and produce such a computer within such a short period of time.


 * The only proof I have are my transcripts and Diploma from Control Data Institute back in 1971, letters from CDC management over the next 8 months acknowledging my ‘contribution’, and the final letter from Corporate Headquarters in Minneapolis, Minnesota, advising me it would not be feasible to incorporate the design. The latter was almost 8 months from when I first submitted my design.  I also have the schematics in both CDC logic and Boolean.  My design eliminated 90% of the circuitry (components) of their present adder, which at that time was the fastest in the world. I do know that Control Data was very excited over the speeds offered by my circuit.  What I didn’t know was the connection between Seymour Cray and Control Data Corporation back in 1971.


 * All I am trying to do here is get just a little credit for my contribution. If necessary, I’ll be happy to forward copies of all documentation to be verified and recorded.


 * Joseph Patrick O'Brien Jr.

Jopedia (talk) 06:31, 16 December 2007 (UTC)


 * I think I understand your frustration. There are several hurdles to overcome for inclusion in the article, but it might be possible to do so if it were published already.  You say you found it online already?  Where?  If it's somewhere which does fact checking, that might earn a mention.  Better yet, perhaps you could submit it to EE Times, or CNet or somewhere reasonably credible like that—maybe Tom's hardware?  Even if you sent the proof to me, it still wouldn't meet WP:V, as other wiki editors couldn't easily verify it too.  —EncMstr 07:37, 16 December 2007 (UTC)

It would indeed be nice to get over the hurdles, but for me to now approach EE Times, CNet, or even Tom’s Hardware and convince them would take more time and effort then it took to design the original circuit.

You asked where online the circuit is. That’s easy to answer. Just a simple search of the words “adder computer logic diagram” (without quotes) will bring in about 500,000 hits. A quick and easier way is use the Internet site "Pic Search" and enter the words Full Adder. This is the exact circuit that I presented to Control Data Corporation almost 38 years ago.



The circuit is in most computer science / engineering books of today which address computer logic, Boolean algebra, and computer arithmetic [adder] circuitry

Later on in his career, Seymour Cray – Father of the Super Computer, was quoted in saying where he got his inspiration. He had a tunnel he built under his house. [Quote]

“While I’m digging in the tunnel, the elves will often come to me with solutions to my problem”.

So, as Seymour Cray was talking to his elves while digging in his tunnel, I was at the same time digging. Digging footings, tying steel, pouring concrete for foundations and retaining walls. In addition to my computer job, I was a cement contractor on weekends to help make ends meet. I did this for almost 30 years.

It would be nice to say that the proof of what I’m stating comes from the elves, but it doesn’t. I instead have hard documentation from CDC upper management to back my claim. Please note that I in no way attacked Seymour Cray’s credibility with my entry, as there would be nothing to gain in doing so. Reading up on his life and accomplishments is very impressive. Perhaps even he was unaware of the origin of the circuit. As stated earlier, big business often uses strange tactics, and in this case, very large profits were at stake.

In a previous wapedia Talk:Cray session, about 2 weeks back, my small addition was challenged with the heading of '''"Joseph Patrick O'Brien Jr."... actual Cray Inventor?'''

Since I was unable to respond to that Talk session, I tried to contact the poster, Randall Lee Reetz, directly to answer his very valid questions. I’ve not had a reply as of yet. He was curious to where I was, and what my ownership / stake was with Cray and if I benefited in any way. My only benefit would be having my contribution being acknowledged or at least mentioned. It was instead deleted, but I do understand now the strict guidelines required. I will not waste any more time on the issue. I do thank you for the time you’ve given me.

Jopedia (talk) 19:15, 16 December 2007 (UTC)


 * Maybe someone has traced the work already? I don't suppose it's mentioned in a patent?  Googling for digital circuit "full adder" 1971..1975 origin turns up these interesting results:
 * Adder (electronics)
 * http://www.waset.org/pwaset/v13/v13-15.pdf
 * http://www.wipo.int/pctdb/en/wo.jsp?WO=1986%2F07173&IA=WO1986%2F07173&DISPLAY=DESC
 * Are any related? —EncMstr 22:00, 17 December 2007 (UTC)
 * http://www.wipo.int/pctdb/en/wo.jsp?WO=1986%2F07173&IA=WO1986%2F07173&DISPLAY=DESC
 * Are any related? —EncMstr 22:00, 17 December 2007 (UTC)

__________________________________________________________________________

Yes indeed. All are related with the exception of the link to US patent 5255452, which seems to apply to an anti-gravity shoe device. Perhaps that is the shoe that gave me the boot somewhere along the line.

The very first link to Adder Electronics shows the exact circuit (Boolean) of my design submitted to CDC in 1971.

The link to the first patent, US3978329, is dated Aug 31st, 1976. Several years after my circuit was submitted to CDC. And it applies to a specific mix of components, of which there can me many.

The other links seem to offer general specs on the different adders and the components involved. Once a circuit is designed and patented, other manufactures need only change one component to obtain their own use (or patent) without creating copyright infringement. This opened up a wide array of uses since both TTL and CMOS technology offers so many different styles of chips and components. In doing so, there is a sacrifice to speed, however it is quite small.

What was unique about my design (circuit) was that when converted to Boolean, it offered the absolute minimum circuitry needed, thus the fastest logic circuit attainable. I noticed another Wikipedia article talks of the spin-off of Cray from CDC in 1972, and that CDC actually lost the crown of being the world’s fastest computer to a spin-off. It’s obvious that was Cray. Even though, CDC profited since they had direct interest in Cray.

I did think of something that may qualify the paragraph I tried to submit. If I were able to locate the mainframe instructor who was involved back then, would a signed statement from him be sufficient? Though it was 37 years ago, there is a chance that he kept records of the event since he felt it was a design that would have major impact on computer speeds in the future.

Thank you for the attention and time you’ve provided.

Jopedia (talk) 01:51, 18 December 2007 (UTC)

All the above is interesting, but I think you are ignoring history. By 1971, when you claim to have sent your adder idea to CDC, the CDC 3000 systems were at end of their life - as far as new developments went. So no wonder the letter you have from CDC would claim it was not feasible to use. Also the CDC 7600, which had fully pipelined adders (and all other operations - except divide) and ran at 27.5 ns (36 mhz), had long since been designed and already been in the field for a year or two.

The Cray-1 continued with pipelined everything like the 7600 (and even had a way of doing pipelined divides), and ran at 12.5 ns (80 mhz). Considering the 7600 was implemented in discrete components and core memory, and the Cray-1 used multi-gate ECL chips and 1K bit memory chips, this factor of 2.something speedup can easily be explained by the difference in density of circuitry.

If you ever get a chance to compare the backplane wiring of a 7600 with that of a Cray-1, like during a visit to the Computer History Museum, you will see that the wire lengths to interconnect the circuit boards are much shorter in the Cray-1 (due to the famous C-shape) than they are in the 7600.

Architecturally, the big innovation in the Cray-1 compared to the 7600 was to make pipelining more efficient by the introduction of vector registers, vector instructions, and vector chaining. As backwards compatibility was not an issue, Mr Cray also took the opportunity to change to twos complement math and 64-bit words. And I/O was pretty different too.

--Wws (talk) 06:26, 7 January 2008 (UTC)

_______________________________________________________________________


 * Thanks for the input. I see you have some knowledge in this area, perhaps hands on versus just Wikipedia knowledge.  That’s good as we can go into a little more depth.  I wouldn’t go so far as to say I’m ignoring history, since I was an active engineer from 1971 till 2005.  Though I retired as a Systems Analyst / Programmer, my background was mostly hardware in both repair and design.  I spent 17 years with DEC as well.


 * One thing to keep in mind, a computer is only as fast as its adder. The use of CMOS, ECL, Schottky, etc. only compliments the speed.  And 2’s compliment is only a method speed enhancement within the adder. Pipeline instructions, multi-processing, speed memory, it can only go as fast as the adder.


 * I was well aware at the time that the CDC 3000 / 6000 series had reached end-of-life, at least where R & D was concerned. But the 6000 series was still the worlds fastest at the time and its adder was incorporated in the 7600.  So the circuit I redesigned was basically the CDC 7600 adder.  I didn’t claim that I sent it to CDC Designing and Engineering Headquarters, I stated that CDC management sent it with my permission.  I sat in a meeting with the head of the school, several of their engineers and my mainframe instructor when that decision was made.  Try to keep in mind, I’m not just tossing numbers around that I got from Wikipedia articles, I’ve actually worked on the CDC 3X00 / 6X00 computers.  And I don’t mean just swapping parts as is done today.  We put the PCB’s on extender cards, hooked up 4 or 6-channel storage-scopes, and troubleshot down to the component level.  Did this for many years with Digital Equipment Corp. as well.


 * In addressing speeds, you have to remember back then (1970) it was mainly the hefty but slower TTL circuitry and the emerging but faster and more heat sensitive CMOS, not yet fully developed. Being a student at the time, I did not have access to the tools and hardware to build my adder, but the schematic was checked and studied by engineering (Seymour Cray) closely for almost 8 months.  As for the 1976 release of the Cray-1 utilizing multi-gate ECL technology, I was designing and working with emitter-coupled-logic five years prior, so it was available and in use at the time, not something newly introduced with the Cray-1 in 1976.  Ten years prior, from 1964 through 1967, I worked with IBM, Honeywell, and Burroughs computers that also employed ECL.  As for the Cray-1, I’m sure the redesigning, short-path, pipelining, memory speed, and multi-processing helped, but it was now being applied to a circuit offering the fastest arithmetic instruction possible.  My circuit.


 * The CDC 6600 adder circuitry had approximately 250 components strung out in 13 ranks of inverters, a full 24 bit adder. My circuit was only 24 inverters in 2 switching ranks.  My design incorporated the use of Schottky technology, making it even faster.  It included the 2’s compliment as well as the capability of being a 64-bit, or even 128-bit full serial adder.  I don’t think it’s necessary to go into the speed / threshold of the PN junction nor the memory speeds at that time.  Nor should we have to discuss technology specs from 37 years ago.  I’m just too tired.  I just figured my documentation from CDC management at the time would be good enough for at least a mention.


 * What’s ironic is that I was just a few miles away from Los Alamos, where the first Cray was sent in 1976, and I also toured the NCAR facility in Boulder, Cray’s first customer.


 * I do thank you for at least giving me your time. Having someone technical reply is at least reassuring.  Maybe the entry could be reworded in some manner to at least acknowledge my contribution.  I do have the documentation.


 * Thanks again

--Jopedia (talk) 07:49, 10 January 2008 (UTC)

Hi,

Again, I think you are ignoring timelines and realities. There was no huge leap in adder performance between the 7600 and the Cray-1.

The 7600 was designed and built in the mid- to late-60s. My 7600 Hardware Reference Manual (CDC pub #60258200) shows a first publication date of 1968. But the design was in place before that. (A friend and former collegue of mine was on the 7600 team in Chippewa Falls from 1968 to 1971...)

The integer add functional unit latencies on the 7600 were 2 clock cycles, and on the Cray-1 were 3 clock cycles. So total integer add latency for the two machines was 55 ns vs 37.5 ns. In both cases the functional units were pipelined, so they could accept new pairs of operands every cycle. But being a scalar machine, and having a much smaller register set, the 7600 was harder pressed to effectively utilize the pipelining than the Cray-1 was.

Mr Cray really did start Cray Research because of animosity towards CDC management and the need for a fresh start. Not because of an adder idea that floated by some underlings desk. (It would be interesting to know who signed the letter that was sent to you.)

I did not claim the Cray-1 was the first to use ECL chips. But Cray certainly was able to run them 'hotter' than most other companies - thanks to some of the packaging and cooling technologies (another important part of system design) that were used.

And finally, the 6000 architecture was not on its last legs in 1970, as the 3000 was. Variations of the 6000 continued to be designed and built for the next 20 years as the Cyber-70 series (basically the same as the 6000), the Cyber-170 series (reimplementation in ECL chips), and the Cyber-180 series ('dual state' 60- and 64-bit systems. Some CMOS, some ECL.)

--Wws (talk) 19:00, 10 January 2008 (UTC) _______________________________________________________________________


 * Hi,


 * I think the CDC 7600 was first on the market in 1969. I know at the Institute it was considered fairly new.  When I said the 3000/6000 was at end-of-life, I specifically said as far as R & D were concerned.  Of course the 6000 series was active through the 70’s and 80’s as CDC had to maintain contracts and release ECO and FCO support.  And of course the 7600 had been on the drawing board for years before its release.


 * When you pointed out to me [Quote]

The Cray-1 used multi-gate ECL chips and 1K bit memory chips, this factor of 2.something speedup can easily be explained by the difference in density of circuitry.


 * I thought you were saying that this technology explained the speed increase as matching that of my adder. In thinking that, I was only pointing out the technology wasn’t at all new and that my design also incorporated it.


 * As for the adder idea that floated by some underlings desk, that underling was :

Mr. D.J. Delay

Control Data Corporation

'''Corporate Headquarters

Manager - FCO Administration

Customer Engineering Division

8100 34th Avenue South

Minneapolis, Minnesota 55440


 * Since the letter is dated August 31, 1971, you might ask your colleague if he knew this underling since they were at Corporate Headquarters at the same time. I have letters from other managers as well up till January 25, 1972.


 * You seem very technical and I do appreciate your input. I’m going to venture a guess that you are yourself a hardware engineer.  Am I correct?


 * My adder circuit improvement was never used in any CDC system. I only thought it quite coincidental that CDC gave Seymour Cray such a large grant to spin-off and create his own company.  Especially if he left, as you have stated, with such animosity.  CDC held business interest in Cray, there is no disputing that fact. Am I the only one who seems to think this a little odd?


 * I’m afraid I’ve reached the end of the road here. Again, it’s becoming more of a chore in defending my claim than what it is worth.  I just figured it was worth a try since I have documentation and proof.

--Jopedia (talk) 21:07, 10 January 2008 (UTC) _______________________________________________________________________