User talk:Red dog007

what based on you post? what evidence proves 48rop can be in 256bit bus setup?

http://img841.imageshack.us/img841/8467/amdgpuz.jpg Seems to be legit. As well, the HD4 to HD5 increased 16rops without a memory bit increase, which some did think it would, but never did. Why you think it will this time? Plus given current leaked benchmarks, that photo is a lot more realistic with performance.

> Even if they increase roster pipe with out increase bus still they're countering odd number issue. 48rops is odd number and odd number cant fit bus config like 256/512bit bus. sure nvidia's g80 was 24 rop and fermi g100 is 48 rops they also increase double in rops while stay in 384bit. which in case if you're even setup like r770 to cypress you can choose to increase rop without change the bus because it's convertible but if you're in odd number like 3-6-9 you can never fit on the bus with 2-4-8 setup. so the conclusion is cayman can either go with 12x4 roster cluster or go odd bus but recent amd architecture prevent NI from doing roster cluster tweak and 12x4 will create new problem as well. so I would prefer they would go 8x6 since newest leak cayman roadmap shows to have 3 RBE(2 cluster per RBE) and it will be either 192 or 384 bit bus because of 3RBE and odd cluster number. since RBE is tie up with bus width if Bart is 2 RBE(4 roster cluster) and 256bit bus and Jupiter is 1RBE(2 roster cluster)with 128bit bus we can get this conclusion: each RBE are 128bit wide and Barts has 2RBE and get 256bit and Jupiter has 1 RBE and have 128bit so if Cayman is 3/2 of Barts in ALU/TMU/RBE then it will be 384bit bus.

The bench that leaked in early September had not yet prove to be reliable source and many criticism point to the bench was merely just cypress in OC of both core clock and ram very high and the GPUz was photoshoped. —Preceding unsigned comment added by 70.131.114.14 (talk) 06:54, 7 October 2010 (UTC)