ADMS

Automatic Device Model Synthesizer (ADMS) is public domain software used in the semiconductor industry to translate Verilog-A models into C-models which can be directly read by a number of SPICE simulators, including Spectre Circuit Simulator, Ngspice, and HSpice.

Overview
ADMS stands for Automatic Device Model Synthesizer. ADMS can be used to turn Verilog-A compact models into C code. ADMS interpreter parses a Verilog-AMS file to build a data tree. XML filters are applied on the tree to generate the output files.

ADMS aims to reduce the effort of circuit simulator developers to integrate device models - at the same time, it provides the option to compact model developers to use the vendor-neutral language Verilog-A for model definition, improving robustness and maintainability.

ADMS is used by the open source SPICE simulator NGSPICE to support a number of compact models. Following models are supported by NGSPICE using ADMS:
 * MOS EKV (LEVEL=44)
 * MOS PSP102 (LEVEL=45)
 * BJT Mextram 504 (LEVEL=6)
 * BJT Hicum0 (LEVEL=7)
 * BJT Hicum2 (LEVEL=8)

Limitations
ADMS only parses a subset of Verilog-A, and not all statements are supported by all XML filters. Specifically, current controlled voltage sources are not supported in most filters targeting SPICE simulators: Instead, this needs to be represented as a conductance expression (and not impedance).
 * V(..) <+ I(..) // does not work with NGSPICE

i.e. I(..) <+ V(..) Some other language constructions need to be supported in the filter as well Many language features are hard to support with ADMS filters Important aspects of code generation are close to impossible with ADMS and
 * I (..) probes do not work with NGSPICE
 * for loop,
 * case statement.
 * laplace_transform,
 * idt,
 * switching branches.
 * dataflow analysis
 * code optimisation,
 * ADMS is extremely slow (which can be seen on slightly larger models).