James H. Pomerene

James Herbert Pomerene (June 22, 1920 – December 7, 2008) was an electrical engineer and computer pioneer.

Biography
Pomerene was born June 22, 1920, in Yonkers, New York. His father was Joel Pomerene and mother was Elsie Bower.

He received the BS degree in electrical engineering from Northwestern University in 1942. In 1945 he married Edythe Schwenn and had three children.

In 1946, he joined the Electronic Computer Project at the Institute for Advanced Study (IAS) in Princeton, New Jersey, under the leadership of John von Neumann. The project built a parallel stored program computer called the IAS machine that was the prototype for a number of machines such as the MANIAC I, ORACLE, and ILLIAC series. Pomerene designed and implemented the adder portion of the arithmetic unit.

Collaborating with engineers such as Bruce Gilchrist and Y.K. Wong, they invented a fast adder which incorporated a speed up technique for asynchronous adders reducing the time for additive carry-overs to propagate. This design was actually later incorporated in one commercial computer, the Philco TRANSAC S-2000, introduced in 1957, the first commercial transistorized computer.

Pomerene became chief engineer on the IAS computer project from 1951 to 1956.

In Summer 1956, Pomerene joined the IBM Corporation in Poughkeepsie, where he and several others started the development of various electronic computer systems such as the IBM 7030 and Harvest computers. He was appointed an IBM Fellow in 1976. He held 37 patents when he retired from IBM in 1993.

Pomerene was a Life Fellow of the IEEE and a member of the National Academy of Engineering. He received the IEEE Edison Medal in 1993, and the Eckert-Mauchly Award in 2006.

He died December 7, 2008, in Chappaqua, New York.

Selected papers

 * Gilchrist, B.; Pomerene, J.; Wong, S.Y., "Fast carry logic for digital computers" IRE Transactions on Electronic Computers, EC-4 (Dec.1955), pp. 133–136.
 * Esterin, B.; Gilchrist, B.; Pomerene, J. H., "A Note on High Speed Digital Multiplication" IRE Transactions on Electronic Computers, vol. EC-5, p. 140 (1956).