John P. Hayes

John Patrick Hayes is an Irish-American computer scientist and electrical engineer, the Claude E. Shannon Chair of Engineering Science at the University of Michigan. He supervised over 35 doctoral students, coauthored seven books and over 340 peer-reviewed publications. His Erdös number is 2.

Biography
Hayes was born and grew up in Newbridge, Ireland and did his undergraduate studies at the National University of Ireland, Dublin, graduating in 1965. He went on to graduate studies at the University of Illinois at Urbana–Champaign, earning a master's degree in 1967 and a Ph.D. in 1970. He was responsible for the logic design of the input-output channel control units of ILLIAC III. After working in The Hague for Shell for two years, he returned to academia, taking a faculty position at the University of Southern California in 1972. In 1979 Hayes was a Visiting Associate Professor at Stanford. He moved to Michigan in 1982, where he was the founding director of the Advanced Computer Architecture Laboratory. Hayes retired from University of Michigan in 2023.

Research
Hayes is the author of the books
 * Digital System Design and Microprocessors (McGraw-Hill, 1984, ISBN 0-07-027367-7)
 * Introduction to Digital Logic Design (Addison-Wesley, 1993, ISBN 978-0-201-15461-0)
 * Computer Architecture and Organization (3rd ed., McGraw-Hill, 2002, ISBN 978-0-07-286198-3)
 * Quantum Circuit Simulation (with George F. Viamontes and Igor L. Markov, Springer, 2009, ISBN 978-90-481-3064-1)
 * Design, Analysis and Test of Logic Circuits Under Uncertainty, (with Smita Krishnaswamy and Igor L. Markov, Springer, 2012, ISBN 978-90-481-9643-2)

Hayes has written extensively on the use of hypercube graphs in supercomputing, He has also written highly cited research papers on fault-tolerant design, reversible computing, and stochastic computing.

Awards and honors
Hayes became an IEEE Fellow in 1985 "for contributions to digital testing techniques and to switching theory and logical design", and an ACM Fellow in 2001 "for outstanding contributions to logic design and testing and to fault-tolerant computer architecture." In 2004, the University of Illinois Urbana-Champaign department of electrical and computer engineering gave him their distinguished alumni award.

In 2013, the IEEE Computer Society Test Technology Technical Community honored Hayes with Lifetime Contribution Medal.

In 2014, Hayes was recognized with ACM Special Interest Group on Design Automation Pioneering Achievement Award "for his pioneering contributions to logic design, fault tolerant computing, and testing.”

Best paper awards

 * John P. Hayes, Trevor N. Mudge, Quentin F. Stout, Stephen Colley, John Palmer: A Microprocessor-based Hypercube Supercomputer. IEEE Micro 6(5): 6-17 (1986)
 * Ram Raghavan, John P. Hayes: On randomly interleaved memories. ACM/IEEE Supercomputing Conference 1990: 49-58
 * Avaneendra Gupta, John P. Hayes: A Hierarchical Technique for Minimum-Width Layout of Two-Dimensional CMOS Cells. VLSI Design 1997: 15-20
 * HyungWon Kim, John P. Hayes: Delay Fault Testing of Designs with Embedded IP Cores. IEEE VLSI Test Symposium (VTS) 1999: 160-167
 * Vivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes:Synthesis of reversible logic circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22(6): 710-722 (2003)
 * Smita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes: Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices. Design Automation and Test in Europe (DATE) 2005: 282-287
 * Pai-Shun Ting, John P. Hayes: Eliminating a hidden error source in stochastic circuits. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) 2017: 1-6.

Notable students

 * Krishnendu Chakrabarty (Arizona State University)
 * Shawn Blanton (CMU)