Talk:AVX-512

CPUs with AVX-512
I guess there is no existing Xeon Skylake with AVX-512. At least I cannot find a single one on ark.intel.com. I think this was a speculation which did not come true. Or not yet. At least should be marked as speculative, or removed?--Vaclav.hanzl (talk) 13:37, 4 December 2015 (UTC)
 * That is because there are two different kinds of Xeons. The ones that are modified architectures optimized for servers, and those that are just rebranded desktop CPUs sold at a higher price. Only the latter type has been released so far for Skylake, and the last of the former are Haswell-based. Even the next Xeon E5 and E7 scheduled for 2016 will be Broadwell-based not Skylake-based, the Skylake-based have been leaked to be on the readmap for 2017, which fits the 18 months delay we have seen before for the release of the real Xeon versions of new architectures.Carewolf (talk) 23:07, 6 December 2015 (UTC)
 * Intel provides SDE support for "Skylake Server" and "Skylake Client", and you can see the CPUID bits for the former here. See also the Google Cloud Platform Blog, where they discuss AVX-512 support. Jeff.science (talk) 18:02, 10 April 2017 (UTC)
 * See Intel Xeon Scalable Processors, Intel Xeon W Processors and Intel Core X-Series Processors for examples of Intel processors with AVX-512 support. Jeff.science (talk) 18:31, 7 December 2017 (UTC)

Increased benefit.performance from 256 to 512??
Can someone explain, in not so technical terms, the increase in performance or benefit this avx-512 will have over the avx-256? — Preceding unsigned comment added by 142.113.122.146 (talk) 13:28, 3 December 2017 (UTC)


 * Any increase in performance depends on the nature of the workload. In many applications, the effect of avx-512 is merely to increase power consumption ( https://www.pcgamer.com/intel-is-set-to-disable-avx-512-on-its-12th-gen-cpus/ ). Whether it will be implemented in all future Intel x86 CPUs is unclear, so it may not be a good idea to develop applications that rely on it. Longitude2 (talk) 14:03, 11 May 2022 (UTC)

512b SIMD instructions do twice the work per instruction as 256b SIMD instructions. For strictly compute-bound code (e.g. dense matrix-matrix multiplication implemented properly, i.e. SGEMM or DGEMM in optimized BLAS libraries), this leads to a doubling of performance per cycle. Performance per time may not double if the frequency drops during the execution of wider SIMD instructions, which is known to happen in Intel processors based on the Skylake-microarchitecture. Jeff.science (talk) 18:26, 7 December 2017 (UTC)

= AVX-512 was proposed by Intel in 1993. ==

Where did this line come from? They really need a source for this wild claim. Wayne (talk) 21:51, 4 October 2019 (UTC)

Use of AVX-512 and AVX-2 (256 bit mode) can reduce core frequency
It's nowhere stated in the article, that using AVX-512 and AVX-2 (256 bit mode only) can reduce the core frequency of the CPU which might lead into a program that is slower when using AVX-512 than using no AVX-512. Read here for more information about that topic. --91.89.138.29 (talk) 22:35, 6 October 2019 (UTC)

Font in heading
Does anyone else get a font feature in the heading here that make the 512 of AVX-512 not line up? It looks like an artistic choice, and probably a new CSS for Wikipedia in general, but it looks really bad here. Anyone know if can be turned off, if we can adjust the default style sheet for headers in an article, or do it manually for each instance? Carewolf (talk) 10:30, 15 February 2020 (UTC)
 * Ah, it is the Georgia font, and how shows numbers by default.Carewolf (talk) 10:37, 15 February 2020 (UTC)

QEMU supports emulating AVX-512 in its TCG.
I don't think QEMU actually supports emulating AVX-512. When I try with 5.1.0 release, I get:

qemu-system-x86_64: warning: TCG doesn't support requested feature: CPUID.07H:EBX.avx512f [bit 16]

MGorny (talk) 08:28, 25 October 2020 (UTC)