Talk:Address bus

Reverting changes made by FrankB
I have reverted the edit made by Fabartus to this article because I have identified a number of issues with those revisions:


 * Some of the comments regarding parasitic capacitance are nonsense. Increasing the bus width is basically about duplicating circuitry - the circuitry for each line is independent and they do not effect each other in the manner described.  Any parallel bus potentially has problems with timing skew as speeds are increased but this is a different issue, and in any case not specific to address buses.


 * Some of the new content is not directly relevant to article in question - there is no need to discuss the drivers controlling the lines in my opinion - if we were going to go into excessive detail we could also discuss the motion of electrons in copper PCB traces, but adding info such as this would only serve to distract from the main thrust of the article. It also presumes certain details of the implementation for no good reason - what about optical computers, for instance?  Similar comments can be made to some of the coverage of DMA and the MMU - whilst these are related areas they have their own pages so we don't need to cover every aspect of them here.


 * Address bus limited to 4MHz. Are you having a laugh?


 * The 'missing' least significant bits - this is far from impossible. Look up VESA local bus for instance - you won't find lines A0 and A1 in the pin out because they don't exist - they are always implicitly assumed to be zero.  As a consequence hardware is only capable of full word aligned transfers. —Preceding unsigned comment added by CrispMuncher (talk • contribs) 21:54, 12 July 2008


 * I agree. The edits were nonsense. A rather elaborate hoax I think. Rilak (talk) 04:48, 13 July 2008 (UTC)

Hah
The JOKE is the current article... though admittedly t'was not my best work.

Thanks for the courtesy CrispMuncher, I appreciate the message. On the edit, admittedly, I was late night winging it, but back in the days I did microprocessor designs (5) load capacitance was a big deal in board layout design and remedial measures. Doubly so in backplane architectures, so perhaps MOS technology has improved... it's been a while since I looked at any chips specs--well over a decade and a half now that I think about it.

Admittedly chip technology has advanced a few quantum, and runs are so much shorter now that much is no longer a first order effect but it was also my understanding that data through rates were still clocked way below processor tic rates. I KNOW my desktop, with 2Ghz processor has a data clock of 4Mhz, so perhaps you need to check a bit further before throwing out that baby with the bath water. Perhaps 4 Mhz is no longer the ceiling, but then I've been away from hardware aspects for a long while.

The excess-to-and-off-topic is admittedly something I knew, but at that hour, after 15-20 phrasings and rephrasings and moving this sentence there or here... figured I'd revise and extend some other day. Frankly, it was a very unplanned edit, solely triggered by the fact that I WAS AND AM TOTALLY AMAZED such fundamentals weren't covered exhaustively AND WELL three or four years back. See Data bus for a good CRY. Don't look hard... it's not there, and neither is I/O bus that I can find. Bus (computing) is so busy linking other articles it doesn't educate either. Last I looked we were an educational project of an educational foundation... has that changed?

So far as I can see the article is very poor as is... so fix it. It really doesn't convey to anyone outside the computer fields anything about how a bus works and why its important...

Your VESA local bus reference is really off point. Local bus optimized for word DMA transfers is not the main memory address bus, but I am and was aware there a are a relatively few installations using full word addressing without byte capability... THAT is information that should be buried if mentioned at all... why confuse people you're trying to give the basics.

As the article stands, on a quality scale 1-5, it tops out at .5, so you want to revert... I don't revert. But suggest you get your writers hat on and start servicing the customers per WP:NOT PAPERS. ANY IDIOT trained in the field can through jargon into a page. It takes skilled writing and a lot of effort to convey information clearly that is not depedent upon linking to get the gist across so Johnny Nineyearsold can see whats what. I tend to avoid professional topics for ones more in line with avocations like geology and history, but if computer topics go on needing TLC, you'll see me take a hand when needed. I've already put data bus on my TO-DO Bookmarks, surprise me and beat me to it. // Fra nkB 05:57, 14 July 2008 (UTC) (xpost, CrispMuncher)


 * You do have some points, however, we need to bear in mind that this is an encyclopedia, not a tutorial or text book. An article on address buses should be focused primarily on those, not on the wider mechanisms by which data is transferred.  I agree that Bus (computing) has lost focus and is little more than an enumeration of various expansion buses, rather than an exposition of the essential concepts of what a bus is and how it works.  However, that does not mean this page should become what that article should be. IMHO this article is pitched at about the right level, but that point is certainly arguable. At the end of the day an address bus is a fairly abstract topic for most people - it is simply half of something else, after all an address bus is fairly useless without a corresponding data bus (now that is something that should be covered here at least in passing).  We could also legitimately mention a few other related bus signals (e.g. address valid, read/write) to give some inkling of how a basic transfer takes place, but the meat of that subject is something that belongs on the generic bus page.  This article is admittedly little more than a stub as is, but that does not need we need to pad it out with off topic material.


 * The VLB reference is to the point. You suggested that the missing bits were impossible, so I cited an instance of an address bus where this actually happens. It is perfectly on topic for an address bus - we don't need to restrict the discussion to main memory buses since the article discusses address buses in the round.


 * I'm also curious as to why you think that your address bus works at 4MHz. It doesn't.  Whilst the situation is muddied with the likes of fast page and burst modes it is certainly a lot faster than that - you would generally say that it runs at the speed of the bus so that it is the 400Mhz range for the front side bus of modern equipment - the backside bus address bus works at the CPU clock speed - GHz.  My ancient 8MHz 8086 had an address bus working at - you guessed it - 8MHz.  My 100MHz 486 DX4 ran its main address bus at 33MHz, the same as the external clock speed. CrispMuncher (talk) 10:03, 14 July 2008 (UTC)

Suggestions then
I stand corrected. 400 Mhz is overlooking a few multiples of tens. The first micros I designed with were lucky to handle 1 Mhz if and only if one exceeded manufacturers recommendations, so ... ''call it mental inertia... or what I do. A brain fart. Sucks to get older.'' The second I chose for it's task, by the way, because it could handle 2 Mhz... the minicomputer it was being interfaced to had a clock of ca. 700 Khz as I recall. We got a laugh that the periphial was more advanced than the platform it serviced. Times have changed!

I think the overall thing that needs ironed out is what should be covered in which articles, and names for those. If we postulate Address bus should inform a lay person the basics of what it does, ditto I/O bus, and ditto Data bus, some discussion of the specialty buses can be handled in buses (computers) or other title such as computer bus types. That focuses the material. Perhaps another general educational encyclopedia should be consulted, several really. We aren't limited to their coverage, but for the basic fundamental articles, probably shouldn't exceed them much either.

Bottom line, some tutorial instruction is needful on one page or another, or we're just writing for each other. Basic information needs be conveyed or we might as well just all go masterbate&mdash;which at least will have a personal result.

The title is supposed to be elaborated upon by the article. One need not get too complicated to get across it inneracts with different kinds of memory, to open the gate to the correct pigeonhole. I just keep seeing computer articles talking way over a customers heads. That stuff should be in different article. The computer buses article makes a fair start in that direction, iirc. This title, data bus, and I/O bus should be elementary material and coverage, or alternatively, a address bus (fundamentals), data bus (fundamentals), I/O... should be written and kept separate save for see also links. Might even consider legacy schemas and some dates in title break outs, but danged if I'd want to research that. On the other hand, others may know exactly where to find cites and already have a good handle of the relative histories. So kick that around too. I'm not really gonna poke my head in here beyond my occasional fly-by edits. So refocus on the customers needs and proceed from there and do your best. No one can ask more of anyone than that. Cheers. // Fra nkB 22:41, 16 July 2008 (UTC)


 * asides
 * @Fabartus, my apologies for my hasty conclusion that your edits were a hoax. Rilak (talk) 10:56, 14 July 2008 (UTC)
 * Accepted. My skin is thick. (Not used to being reverted though!) // Fra nkB 22:41, 16 July 2008 (UTC)

Asserted {Confusing} tag

 * Per the above discussion... get the jargon out and put some meat into this article. Who gives a rats ass about cross-links to this or that companies proprietary architectures; convey the concepts! // Fra nkB 06:01, 14 July 2008 (UTC)


 * I hope you are not referring to my recent edits about the DEC 21264 and 21364. I mentioned them as real-life examples to demonstrate the concept that address buses do not have to be of the same width as the implementation's physical address. I agree, there is no need to discuss every single implementation, but when discussing a concept, especially one so unique (I have not heard of any other microprocessor utilizing such as scheme), I believe it is important to show some examples. Rilak (talk) 10:46, 14 July 2008 (UTC)


 * Unique? I was under the impression that *every* computer that uses DRAM (including practically every desktop and laptop computer) uses "multiplexed row/column address lines" that are not quite wide enough to hold a complete address at one time. --68.0.124.33 (talk) 02:27, 9 September 2008 (UTC)


 * My previous comment was in the context of modern (after 1990) microprocessor address buses, not memory. It is common and incorrect general knowledge that the width of a microprocessor's address bus is equal to the amount of memory it can address, which I believe should be clarified to avoid presenting an incorrect view. Rilak (talk) 09:14, 9 September 2008 (UTC)


 * As an experienced programmer who has recently switched to writing C-code for embedded targets, I often come to Wikipedia for introductory material on concepts that are new to me, or technology that I have not previously needed to know about. I can confirm that this article was of no use whatsoever. Labalius (talk) 15:25, 30 October 2008 (UTC)


 * This article is a bit thin but there are no grounds for the confusing tag. The article is about its subject which is a fairly abstract concept for most people but there is nothing here to confuse the reader.  Stub?  Definitely.  Confusing?  I think not.  I think I'm going to remove that tag now because reading above it seems to be retaliation over some reverted edits.  It was certainly no more confusing than with the reverted material in, which as explained above contained numerous factual errors. 79.69.7.96 (talk) 22:10, 8 December 2008 (UTC)


 * I must say I found the article confusing too. Not because of bad or incorrect content, but because there was no structure to the article and there was too many examples without first (in my opinion) giving a good context. I knew an address bus is used to send addresses, but wanted to find out the how, and where to/from. Like Labalius I found the article of little use.


 * I have reworked the article, trying to give it a bit more structure and hopefully giving someone who doesn't already know all about buses and processors a chance of 'getting it'. I ended up removing a lot more existing content that I had planned, but found that most of what was left was confusing and didn't add anything. Sorry if I've offended anyone. I have also added the unverified tag as I have not cited any sources. Gechurch (talk) 14:21, 21 January 2009 (UTC)