Talk:GE 645

Need fuller description of hardware
This article is mostly what would go under "History" in a fuller article. What's missing a crisp description of its distinctive feature: segmented addressing. The 645 was certainly not the first computer to have hardware protected memory or paged memory. Maybe it was first to have "configurable hardware protected memory", but I have no idea what "configurable" means in this context. Mdmi (talk) 01:29, 5 December 2019 (UTC)

2023 edits
As mentioned in my most recent commit I've split this article up abit, as mentioned on the talk page most of content would come under 'History' in another article. For the moment I've put the bulk of existing text under that while splitting out some of recent additions into a 'Architecture' section. This will need to be extended to include discussion on Modes (GE-645 added additonal processor mode), TLB, Virtual Memory, reconfiguration etc. We can always rename these sections, the IBM System/360 Model 67 article proves an interesting comparison. Particulary as it was announced by IBM as a response to the successs of GE winning the Project MAC contract. Dóeltenga (talk) 14:22, 27 September 2023 (UTC)

I removed the claim about MLS when it comes to the 6.36 simulator running on GE 636 in MIT. The history section needs to be expanded to include why MIT decided to go with General Electric over IBM in first place (unhappiness over lack of virtual memory in announced IBM 360 etc). I also think the bit at end about Hardware rings is bit redundant as the 645 did not support Protection rings in hardware Dóeltenga (talk) 21:50, 19 October 2023 (UTC)
 * The bit about hardware rings is useful as a short "what they decided to fix in the 6180" note. It doesn't need to be expanded; a detailed description of the hardware ring feature would probably belong either in a "Honeywell 6180" article or a "Honeywell 6180" seciton of Honeywell 6000 series. Guy Harris (talk) 06:10, 3 November 2023 (UTC)
 * indeed, I'm not particular huge fan of the last paragraph talking about 286 and how  '... four rings was found to be too cumbersome to program and too slow to operate...'
 * Strikes me as a personal opinion more then one grounded in facts (unless it can be cited somewhere). My thoughts if we are gonna mention x86 rings would be to mention that a number of security oriented OS's such as GEMSOS or BAE XTS-400 (derived from Honeywell Scomp -- origins in Multics project Guardian) use the hardware rings in x86. As we know the *nix and Win32 lineages were only ever Kernel/User (Master/Slave) mode when it comes to it.
 * I was rereading I think the Dennis paper on a architecture for rings from 1968 and I think perhaps key thing to add with regards to GE 645 is that:
 * rings were simulated (there were up to 64 -- default User ring was '32')
 * Ring crossing was mediated through a 'Gatekeeper' (software) and invoked a trap in the processor
 * As a result there was considerable overhead with ring crossing, so much so that during period 68/69 when Multics was struggling to survive that certain functionalities were moved into Ring-0 to improve performance by avoiding ring crossings etc.
 * Ideally I'd like to cap off the History section with a paragraph just saying that the follow on hardware path was eg:
 * 6180 -> 68/80 (cache) and 68/60 (no cache) -> Level 68/DPS (more marketing rebrand) -> DPS-8/m (dps-8/70m, dps-8/62m, dps-8/52m) -> Flower (cancelled). Most of these can be referenced in the trade press such as Computerworld which tends to have data about pricing as well.
 * Dóeltenga (talk) 12:32, 3 November 2023 (UTC)