Talk:Test-and-set

Untitled
The article previously had a paragraph that said

"However, in multiprocessor systems, it is impossible and undesirable to disable interrupts on all processors at the same time; and even with interrupts disabled, two or more processors could be attempting to access the same semaphore's memory at the same time. The test-and-set instruction, allows any processor to atomically test and modify a memory location, preventing such multiple processor collisions. The processor should still disable its interrupts, as in a uniprocessor system, before executing a test-and-set, to prevent a deadlock if another process running on this processor also accesses that semaphore."

I'm pretty sure that last sentence is incorrect, so I deleted it. My understanding is that the test-and-set assembly language instruction cannot be interrupted by any interrupts, including the one that causes a test-switch to another thread running on this processor. Please tell me if that last sentence was correct for any processor. -- DavidCary 05:36, 3 May 2004 (UTC)

It seems a little redundant to have mostly the same text at compare-and-swap -- should we combine them somehow ?

Seems redundant to me too. Test-and-set effectively swaps value in memory with true. If observed from memory bus both do same operations atomically: one read and one write. Main difference in actual CPU instruction test-and-set is that it also sets CPU condition codes accroding the value read from memory (zero or non-zero). I vote for a combination where we first describe atomic swap and then the 'fine graned' version test-and-set. --Jyke 11:55, 17 Jun 2005 (UTC)

Test-and-set should not be merged with compare-and-swap. The two are different. Test-and-set does not always just check for equality and swap if not. Other, more sophisticated tests are possible, such as "if i < 17 then i = 28".

Also, please note that the texts of the two pages are no longer similar.

I am new to Wikipedia and don't have a user name to post.

I think the definition of test-and-set "If the test fails, the value is not set." may have need some correction. According to "Operation System Concepts" By Abraham Silberschatz, etc., in page 198 about the definition of TestAndSet instruction. The test and set operations are always executed no matter the test fails or not... —Preceding unsigned comment added by 76.17.106.208 (talk) 15:54, 6 October 2007 (UTC)

Wiki Education Foundation-supported course assignment
This article is or was the subject of a Wiki Education Foundation-supported course assignment. Further details are available on the course page. Student editor(s): Dchandr2.

Above undated message substituted from Template:Dashboard.wikiedu.org assignment by PrimeBOT (talk) 10:54, 17 January 2022 (UTC)

Bad readability
Compare int TestAndSet(int* lockPtr) { int oldValue; oldValue = SwapAtomic(lockPtr, 1); return oldValue != 0; } with Result of test is no longer magic number.

Creating union might be better for readability but is is not so commonly known ? People know what #define means more than what union means? 84.16.123.194 (talk) 18:13, 31 May 2009 (UTC)

Broken reference
The last reference, http://people.cs.clemson.edu/~wayne/cpsc823/threads/testandset.s, appears to be 403ing. --130.85.224.228 (talk) 15:52, 13 March 2013 (UTC)

Extraneous IBM vs Amdahl text in Overview
This text: "Ultimately, IBM would release a processor family with 12 processors, whereas Amdahl would release a processor family with the architectural maximum of 16 processors" seems off-topic for this page, and certainly out-of-place in the Overview for the page. I suggest we remove it. --Pnkfelix (talk) 13:56, 11 June 2013 (UTC)

There are two sections called "Hardware implementation of test-and-set". The second one describes using the already existing tsl cpu instruction for "Implementing mutual exclusion with test-and-set", so it should be part of that very section. — Preceding unsigned comment added by Lucian.ciufudean (talk • contribs) 09:55, 2 April 2014 (UTC)

Assembly listing for critical section
What kind of instruction set it is? There's no TSL instruction in x86.

For 8086 that should be (taken from The Intel 8086 Microprocessor: A 16-bit Evolution of the 8080 by Morse et all): ENTER_REGION: MOV AL, 1           ; The intent to lock LOCK XCHG SEMA, AL  ; test and set lock TEST AL, AL         ; check if we've got the lock JNZ ENTER_REGION    ; retry if lock has been taken by someone else ...   CRITICAL REGION ...   MOV SEMA, 0          ; clear the lock when done  — Preceding unsigned comment added by Roolebo (talk • contribs) 19:29, 23 January 2019 (UTC)


 * It's no particular instruction set. The TSL instruction is explained in comment beside it. Wikipedia is in the business of explaining the general concept, not in teaching coding (that's Wikibooks responsibility), or any specific architecture. A didactic "TSL" mnemonic, for a generic Test and Set Lock instruction, is used in a number of textbooks, including Tannenbaum. -- Finlay McWalter··–·Talk 20:34, 23 January 2019 (UTC)