AMD K6

The K6 microprocessor was launched by AMD in 1997. The main advantage of this particular microprocessor is that it was designed to fit into existing desktop designs for Pentium-branded CPUs. It was marketed as a product that could perform as well as its Intel Pentium II equivalent but at a significantly lower price. The K6 had a considerable impact on the PC market and presented Intel with serious competition.

Background


The AMD K6 is a superscalar P5 Pentium-class microprocessor, manufactured by AMD, which superseded the K5.

The AMD K6 is based on the Nx686 microprocessor that NexGen was designing when it was acquired by AMD. Despite the name implying a design evolving from the K5, it is in fact a totally different design that was created by the NexGen team, including chief processor architect Greg Favor, and adapted after the AMD purchase. The K6 processor included a feedback dynamic instruction reordering mechanism, MMX instructions, and a floating-point unit (FPU). It was also made pin-compatible with Intel's Pentium, enabling it to be used in the widely available "Socket 7"-based motherboards. Like the AMD K5, Nx586, and Nx686 before it, the K6 translated x86 instructions on the fly into dynamic buffered sequences of micro-operations. A later variation of the K6 CPU, K6-2, added floating-point-based SIMD instructions, called 3DNow!.

The K6 was originally launched in April 1997, running at speeds of 166 and 200 MHz. It was followed by a 233 MHz version later in 1997. Initially, the AMD K6 processors used a Pentium II-based performance rating (PR2) to designate their speed. The PR2 rating was dropped because the rated frequency of the processor was the same as the real frequency. The release of the 266 MHz version of this chip was not until the second quarter of 1998, when AMD was able to move to the 0.25-micrometre manufacturing process. The lower voltage and higher multiplier of the K6-266 meant that it was not fully compatible with some Socket 7 motherboards, similar to the later K6-2 processors. The final iteration of the K6 design was released in May 1998, running at 300 MHz.

Features

 * Seven execution units specialized in parallelized instructions
 * x86 Decoders that translate x86 Assembly to RISC86 instructions
 * IEEE 1149.1 Boundary Scan
 * Speculative execution optimization
 * Out of Order execution
 * Register Renaming

K6 (Model 6)

 * 8.8 million transistors in 350 nm
 * L1-Cache: 32 + 32 KB (data + instructions)
 * MMX
 * Socket 7
 * Front side bus: 66 MHz
 * First release: April 2, 1997
 * VCore: 2.9 V (166/200) 3.2/3.3 V (233)
 * Clockrate: 166, 200, 233 MHz

K6 "Little Foot" (Model 7)

 * CPUID: family 5, model 7, stepping 0
 * 8.8 million transistors in 250 nm
 * L1-Cache: 32 + 32 KB (data + instructions)
 * MMX
 * Socket 7
 * Front side bus: 66 MHz
 * First release: January 6, 1998
 * VCore: 2.2 V
 * Clockrate: 200, 233, 266, 300 MHz

Successor
The K6 line was updated with SIMD instructions (Branded as AMD 3DNow!) to create the K6-2 line of microprocessors.