Phenom II

Phenom II is a family of AMD's multi-core 45 nm processors using the AMD K10 microarchitecture, succeeding the original Phenom. Advanced Micro Devices released the Socket AM2+ version of Phenom II in December 2008, while Socket AM3 versions with DDR3 support, along with an initial batch of triple- and quad-core processors were released on February 9, 2009. Dual-processor systems require Socket F+ for the Quad FX platform. The next-generation Phenom II X6 was released on April 27, 2010.

The Phenom II X4 operates as the processor component of AMD's Dragon Platform, which also includes the 790 series chipset and Radeon HD 4800 series graphics. The Thuban Phenom II X6 is the CPU in the Leo Platform which also includes the AMD 890 chipset and the Radeon HD 5800 series graphics.

Features
The Phenom II triples the shared L3 cache size from 2MB (in the original Phenom line) to 6MB, leading to benchmark performance gains as high as 30%. In another change from the original Phenom, Cool'n'Quiet applies to the processor as a whole, rather than on a per-core basis. AMD implemented this to address the mishandling of threads by Windows Vista, which can cause single-threaded applications to run on a core that idles at half its clock rate. This feature can be disabled through BIOS options on most motherboards, which allows for customization and overclocking. Due to the nature of this feature, it reduces the effectiveness of overclocking the CPU and RAM, but also decreases power consumption and heat output.

Socket AM2+ versions of the Phenom II (920, 940) lack forward-compatibility with Socket AM3. Socket AM3 versions of the Phenom II are backwards-compatible with Socket AM2+, though this is contingent on motherboard manufacturers supplying BIOS updates. In addition to the Phenom II's pin compatibility, the AM3 memory controller supports both DDR2 and DDR3 memory (up to DDR2-1066 and DDR3-1333), allowing existing AM2+ users to upgrade their CPU without changing the motherboard or memory. However, similar to the way the original Phenom handled DDR2-1066, current Phenom II platforms limit the usage of DDR3-1333 to one DIMM per channel; otherwise, the DIMMs are under clocked to DDR3-1066. AMD claims that this behaviour is due to the BIOS, not the memory controller; several board manufacturers have addressed the issue with a BIOS update. The dual-spec memory controller also gives motherboard manufacturers and system builders the option of pairing AM3 with DDR2, as compared to competing chips from Intel which require DDR3.

"Thuban" and "Zosma" Phenom II processors support AMD's Turbo Core overclocking performance-boost technology. When not all cores are needed, the processor will automatically overclock up to half of the cores by up to 500 MHz, leaving the other half idle. In turn, when the application demands more than half of the cores, the processor will run on standard clock rate and with all cores enabled. The flagship AMD Phenom II X6 1100T shifts 3.3 GHz to 3.7 GHz.

Some top-level AM3 processors (x945 125W, x955 and x965) require a special power-supply feature, often called "dual power-plane". It's supported by default in all native AM3 mainboards, however not in most AM2+ mainboards, even those advertised as "AM3 optimized" or "AM3 ready". Processor running below its nominal speed (i.e. at 800 MHz), clock and multiplier locked are symptoms of this incompatibility. This is caused by the processor itself: when it detects that the motherboard does not supply dual power planes, the chip locks its multiplier to 4x. This issue is not resolvable via a BIOS update; however, users of AM2 and AM2+ motherboards can still use Phenom II processors excluding the 125 Watt variants.

Beginning with the AM3 versions, Phenom II CPUs are based on two dies: the original Deneb die with four cores and the new Thuban die with six. These are divided into five series for marketing. The first two series are flagships based on full dies. The other three series are formed from Deneb dies by die harvesting, that is, chips that were produced with some amount of defects. The affected portions of these chips are disabled and the chips themselves marked as a lower-grade product.


 * 1000T series: Flagship X6 series with full complement of cores, L3 cache enabled and Turbo Core.
 * 900T series: Based on X6 series but with two cores disabled and Turbo Core.
 * 900 series: X4 series with full complement of cores and L3 cache enabled.
 * 800 (original) series: These are X4 chips with some amount of defect in the L3 cache; 2 MB is disabled, leaving the chip with 4 MB L3 cache and fully operational cores. Available as model 805, 810, 820 and 830.
 * 800 (second) series: These are chips based on the Athlon II Propus quad-core without L3 cache albeit marketed as Phenom II, available as model 840 and 850
 * 700 series: These chips have one core disabled, leaving them with three operational cores (marketed as "X3") and a fully operational L3 cache.
 * 500 series: These chips have two cores disabled, leaving them with two operational cores (marketed as "X2") and a fully operational L3 cache.

Some versions of the Phenom II X2 and X3 have one or two cores "deactivated" to enable AMD to target the lower end of its market. However, from outside, a user can never determine whether the disabling of the core(s) was merely due to marketing reasons (with the disabled cores being fully functional in reality) or whether they are actually defective hardware-wise. So even though with the correct motherboard and BIOS, it is possible to unlock the deactivated core(s) of the processor, success is never guaranteed, because the user might catch the awkward case where one or more core(s) were deactivated due to faulty silicon. Hardware enthusiast websites have collected and summarized anecdotal reports that, overall, indicate about a 70% success rate, but these reports likely have self-reporting bias, and more importantly, it is impossible to know whether an unlocked core is truly bug-free.

Overclocking
According to AMD, Black Edition CPUs are "designed to help you unleash the maximum potential of your system with tunable performance." What this means is that the core multiplier is unlocked, allowing for modification of the CPU speed without changing the FSB or HyperTransport. On a non-black edition CPU, the multiplier is allowed to only be lowered. The standard processors allow for overclocking, however not to the point that a Black edition CPU will.

The Phenom II range of CPUs is the first series of AMD CPUs to have a low enough minimum temperature of operation to support "extreme" cooling methods such as dry ice, liquid nitrogen or liquid helium, a deficiency in older CPUs referred to as the "Cold Bug".

In a public demonstration of the Phenom II's overclocking potential at CES 2009 in Las Vegas on 10 January 2009, Sami "Macci" Mäkinen (a record-breaking overclocker) used a Phenom II X4 940 and a DFI LANParty 790FXB-M2RS with a combination of liquid nitrogen and liquid helium cooling to take the processor to a clock rate of 6.5 GHz and succeeded in beating the world record 3DMark 2005 score with a total of 45474.

A group named LimitTeam successfully overclocked AMD’s Deneb 45 nm Phenom II X4 955 processor (Black Edition) on April 30, 2009, and submitted the results for validation to CPU-Z. During the process, the group used the Asus M4A79T Deluxe motherboard, dubbed as the Asus “multidimensional performance platform” featuring support for an AMD 140W CPU and the AMD 790FX/SB750 chipset. As a result, the group reached 7.127 GHz, beating the previous score of 6.7 GHz.

Note that these extreme overclocks involve specialized equipment and are nowhere near what the average consumer could expect using traditional air cooling even with expensive third party cooling fans. For instance, maximum overclocking on a Phenom II X4 955 processor using a heatsink and fan is approximately 4 GHz.

Thuban

 * Six AMD K10 cores
 * 45 nm SOI with immersion lithography and low-κ insulator
 * L1 cache: 64 KB + 64 KB (data + instructions) per core
 * L2 cache: 512 KB per core, full-speed
 * L3 cache: 6 MB shared among cores.
 * Memory controller: dual channel DDR2-1066 MHz (AM2+), dual channel DDR3-1333 with support for ECC (AM3) with unganging option
 * MMX, extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, Cool'n'Quiet, NX bit, AMD-V
 * Turbo Core
 * Socket AM2+, Socket AM3, HyperTransport with 2 GHz
 * Die size: 346 mm²
 * Power consumption (TDP): 95 and 125 watt
 * First release
 * 27 April 2010 (E0 stepping)
 * Clock rate: 2.6 to 3.3 GHz, up to 3.7 GHz with Turbo Core
 * Models: Phenom II X6 1035T, 1045T, 1055T, 1065T, 1075T, 1090T and 1100T

Zosma

 * Four AMD K10 cores chip harvested from Thuban with two cores disabled
 * 45 nm SOI with Immersion Lithography
 * L1 cache: 64 KB + 64 KB (data + instructions) per core
 * L2 cache: 512 KB per core, full-speed
 * L3 cache: 6 MB shared among cores.
 * Memory controller: dual channel DDR2-1066 MHz (AM2+), dual channel DDR3-1333 (AM3) with unganging option
 * MMX, extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, Cool'n'Quiet, NX bit, AMD-V
 * Turbo Core
 * Socket AM2+, Socket AM3, HyperTransport with 2 GHz
 * Power consumption (TDP): 95 Watt and 125 Watt
 * First release
 * Unknown, only released to certain OEMs.
 * Clock rate: 2.7 GHz to 3.5 GHz
 * Models: Phenom II X4 650T, Phenom II X4 840T, Phenom II X4 960T BE and Phenom II X4 970 BE (E0 stepping)

Deneb

 * Four AMD K10 cores
 * 45 nm SOI with Immersion Lithography
 * L1 cache: 64 KB + 64 KB (data + instructions) per core
 * L2 cache: 512 KB per core, full-speed
 * L3 cache: 6 MB shared among cores.
 * Memory controller: dual channel DDR2-1066 MHz (AM2+), dual channel DDR3-1333 (AM3) with unganging option
 * MMX, extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, Cool'n'Quiet, NX bit, AMD-V
 * Socket AM2+, Socket AM3, HyperTransport with 1.8 to 2 GHz
 * Die Size: 258 mm²
 * Power consumption (TDP): 65, 95, 125 and 140 Watt
 * First release
 * 8 January 2009 (C2 stepping)
 * Clock rate: 2.5 to 3.7 GHz
 * Models: Phenom II X4 805 to 980 BE except Phenom II X4 840T, Phenom II X4 960T BE and Phenom II X4 970 BE (E0 stepping)

Heka

 * Three AMD K10 cores chip harvested from Deneb, with one core disabled
 * 45 nm SOI with Immersion Lithography
 * L1 cache: 64 KB + 64 KB (data + instructions) per core
 * L2 cache: 512 KB per core, full-speed
 * L3 cache: 6 MB shared among cores
 * Memory controller: dual channel DDR2-1066 MHz (AM2+), dual channel DDR3-1333 (AM3) with unganging option
 * MMX, extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, Cool'n'Quiet, NX bit, AMD-V
 * Socket AM3, HyperTransport with 2 GHz
 * Power consumption (TDP): 65 and 95 Watt
 * First release
 * 9 February 2009 (C2 stepping)
 * Clock rate: 2.5 to 3.0 GHz
 * Models: Phenom II X3 705e to 740

Callisto

 * Two AMD K10 cores chip harvested from Deneb, with two cores disabled
 * 45 nm SOI with Immersion Lithography
 * L1 cache: 64 KB + 64 KB (data + instructions) per core
 * L2 cache: 512 KB per core, full-speed
 * L3 cache: 6 MB shared between cores
 * Memory controller: dual channel DDR2-1066 MHz (AM2+), dual channel DDR3-1333 (AM3) with unganging option
 * MMX, extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, Cool'n'Quiet, NX bit, AMD-V
 * Socket AM3, HyperTransport with 2 GHz
 * Power consumption (TDP): 94 Watt (C2 stepping) and 80 Watt (C3 stepping)
 * First release
 * 1 June 2009 (C2 stepping)
 * Clock rate: 3.0 to 3.5 GHz
 * Models: Phenom II X2 545 to 570 BE